Bridge-Die Bonding Layers for Simpler Fan-Out Packaging

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Solution Overview

Problem

Fan-out semiconductor packages face increased complexity and manufacturing costs due to the use of redistribution layers for routing encapsulated device dies, necessitating a more cost-effective and reliable solution for next-generation semiconductor packaging techniques.

Innovation Solution

The semiconductor package employs bonding layers with vertical conduction paths, eliminating the need for lateral routing and using polymer layers to confine solder caps, thereby reducing complexity and manufacturing costs while ensuring proper isolation and adhesion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If redistribution layers are used for routing encapsulated device dies, then routing functionality is achieved, but packaging process complexity and manufacturing cost increase

Engineering Contradiction:
Improvemanufacturing costVSAvoidpackaging process complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the redistribution layer from the packaging structure, replacing it with direct bonding between device dies and substrate. This removal of the intermediate routing layer simplifies the packaging process and reduces manufacturing cost while maintaining routing functionality through direct metal-to-metal bonding interfaces.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of using a redistribution layer to route signals laterally across the package, the patent inverts the approach by using vertical bonding interfaces with embedded conductive paths. The routing function is achieved through the bonding layer structure itself rather than through a separate redistribution layer, fundamentally changing the signal path architecture.

Inventive Principle:
Principle #13The other way round (Inversion)

2Reliability

If solder caps are used for electrical connection, then adhesion and conductivity are improved, but unintended contact between adjacent solder caps may occur

Engineering Contradiction:
ImproveadhesionVSAvoidunintended contact between solder caps
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces an insulating layer as an intermediary between adjacent solder caps. This mediator prevents unintended electrical contact between neighboring solder caps while allowing the solder caps to maintain their adhesion and conductivity functions for proper electrical connection to the bonding layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent uses thin film insulating layers to separate and isolate adjacent solder caps. These thin films provide effective electrical isolation preventing short circuits between neighboring caps, while being thin enough to maintain compact packaging dimensions and allow close spacing of electrical connections.

Inventive Principle:
Principle #30Flexible shells and thin films

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the packaging process, lowers manufacturing costs, and effectively prevents unintended contact between adjacent solder caps, enhancing the reliability of the semiconductor package.

Implementation Method 1

using polymer layers to confine solder caps

Methodology Applied
Scientific EffectPhysical containment: Physical Containment

Implementation Method 2

bonding layers lying between the device dies and the bridge die, and comprising a first die bonding layer and a second die bonding layer respectively disposed upon the first device die and the second device die, and a third die bonding layer disposed upon the bridge die

Methodology Applied
Scientific EffectDielectric bonding: Adhesive

Implementation Method 3

bonding the second die bonding layer to the package bonding layer, such that the device dies are electrically connected to the bridge die via conduction paths extending through polymer layers of the first die bonding layers, the package bonding layer and the second die bonding layer, and the polymer layer of second die bonding layer is bonded to the polymer layer of package bonding layer

Methodology Applied
Scientific EffectMetal bonding: Welding

Data Source

PatentUS20250006644A1Semiconductor package and manufacturing method thereof
Publication Date: 2025.01.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250006644A1 patent drawing
  • US20250006644A1 patent drawing
  • US20250006644A1 patent drawing

AI summary

A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first device die and a second device die; an encapsulant, laterally encapsulating the first and second device dies; a bridge die, electrically connected to the first and second device dies and establishing communication between the first and second device dies; and bonding layers, between the first and second device dies and the bridge die, and including a first die bonding layer and a second die bonding layer respectively disposed upon the first device die and the second device die, and a third die bonding layer disposed upon the bridge die. Each of the bonding layers includes a polymer layer and metallic features embedded in the polymer layer.