Direct-Bonded Bridge Die Structure for Low-Loss Chip Interconnects

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Solution Overview

Problem

The connection path between semiconductor chips using silicon bridges in System on Integrate Chip (SoIC) packages experiences signal loss, increased energy consumption, and waste heat generation due to resistance issues.

Innovation Solution

The use of silicon bridges directly bonded to target semiconductor chips, utilizing local silicon interconnects, integrated passive device dies, active device dies, or photonic dies to enhance connectivity, with configurations allowing connection of multiple dies and flexibility through hybrid bonding techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If silicon bridges are used to connect semiconductor chips in SoIC packages, then connectivity between chips is enhanced, but signal loss, energy consumption, and heat generation increase due to resistance issues

Engineering Contradiction:

ImproveconnectivityVSAvoidenergy consumption

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

The patent merges the bridge die with the target semiconductor chips by directly bonding them together, creating an integrated structure where the bridge die and target chips form a unified system. This integration reduces the number of separate connection interfaces and minimizes resistance at bonding interfaces, thereby reducing energy loss while maintaining enhanced connectivity.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent employs composite interconnect structures combining copper interconnects within the bridge die and target chips with bonding interfaces. This composite approach optimizes electrical conductivity through material selection and结构设计, reducing resistance and energy consumption while maintaining reliable connectivity between chips.

Inventive Principle:

Principle #40Composite materials

2Reliability

Engineering Contradiction:

ImproveconnectivityVSAvoidwaste heat

Core Design Contradiction:

ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The direct bonding of bridge dies to target chips creates an integrated structure that reduces thermal resistance at interfaces. By merging the components into a unified system with minimized bonding interfaces, heat generated during operation is more efficiently conducted away from critical areas, reducing waste heat accumulation while maintaining connectivity.

Inventive Principle:

Principle #5Merging (Combining)

3Loss of energy

If traditional connection methods are used between semiconductor chips, then resistance issues are avoided, but connector density and signal throughput are limited

Engineering Contradiction:

Improveenergy consumptionVSAvoidsignal throughput

Core Design Contradiction:

Loss of energyVSProductivity

Solution Approach 1:

The patent utilizes three-dimensional stacking arrangements where bridge dies are positioned between and bonded to multiple target chips in vertical layers. This dimensional transition from planar to volumetric interconnection enables multiple signal paths and higher connector density, increasing signal throughput while the integrated structure minimizes resistance and energy loss.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The bridge die serves multiple functions simultaneously: it provides interconnect pathways between different target chips, acts as a routing platform for signals, and enables three-dimensional packaging arrangements. This multi-functionality increases signal throughput and connector density without requiring separate dedicated structures for each function, thereby improving productivity without proportionally increasing energy consumption.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach increases connector density, decreases energy consumption, reduces waste heat production, and enhances signal throughput, enabling higher speed signals between chips.

Implementation Method 1

annealing the combination of the bridge die, the first device die, and the second device die to interdiffuse a metallic material of the first metal pad with a metallic material of the first bond pad

Methodology Applied

Scientific EffectInterdiffusion: Diffusion

Implementation Method 2

annealing the combination of the bridge die, the first device die, and the second device die to interdiffuse a metallic material of the first metal pad with a metallic material of the first bond pad

Methodology Applied

Scientific EffectAnnealing: Annealing

Data Source

PatentUS20250349724A1Method and structure for a bridge interconnect

Publication Date: 2025.11.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

Embodiments utilize a bridge die that directly bonds to and bridges two or more device dies. Each of the device dies can have additional device dies stacked thereupon. In some embodiments, the bridge die can bridge device dies disposed both under and over the bridge die. In some embodiments, several bridge dies may be used to bridge a device die to other adjacent device dies.