Semiconductor Package Bridge Die Interconnect Architecture

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Solution Overview

Problem

Current semiconductor package technologies face challenges in achieving high integration density and efficient data transmission speed due to limitations in interconnecting multiple semiconductor dies without the need for complex silicon interposers.

Innovation Solution

The semiconductor package design incorporates a first and second bridge die with through vias and inner connectors, along with a third semiconductor die and redistribution lines, to directly connect semiconductor dies to the package substrate, reducing electrical path lengths and enhancing data transmission speed without requiring a silicon interposer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a silicon interposer is employed to electrically connect multiple semiconductor dies, then electrical connection between dies is achieved, but device complexity and vertical electrical path length increase

Engineering Contradiction:
Improveelectrical connectionVSAvoidinterconnection structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent removes the silicon interposer from the interconnection structure, directly connecting semiconductor dies to the package substrate through bridge dies with through-vias. This extraction of the interposer eliminates the additional complexity and vertical path length while maintaining electrical connectivity between dies and the substrate.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent divides the interconnection function into separate components: bridge dies with through-vias for vertical connections and redistribution lines on the package substrate for horizontal connections. This segmentation allows direct die-to-substrate connectivity without requiring a complex interposer structure.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If a silicon interposer is used to integrate multiple semiconductor dies, then multi-functional operation is enabled, but vertical electrical path length increases reducing data transmission speed

Engineering Contradiction:
Improvemulti-functional operationVSAvoiddata transmission speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

By removing the silicon interposer from the signal path, the patent directly connects semiconductor dies to the package substrate, thereby shortening the vertical electrical path length and improving data transmission speed while preserving multi-functional capabilities through proper routing of signals.

Inventive Principle:
Principle #2Taking out (Extraction)

3Quantity of substance

If complex interconnection structures like silicon interposers are used, then high integration density is achieved, but manufacturing complexity increases

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing process
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The patent eliminates the silicon interposer fabrication and integration process, simplifying manufacturing by directly mounting semiconductor dies onto the package substrate and forming through-vias in the bridge dies, thereby reducing manufacturing complexity while achieving high integration density.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves data transmission speed and package performance by reducing vertical electrical path lengths, enabling higher integration density and efficient data processing without the need for additional interconnection structures like silicon interposers.

Implementation Method 1

a first bridge die including first through vias that electrically connect the first semiconductor die to the package substrate

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

first inner connectors electrically connecting the first semiconductor die to the third semiconductor die

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 3

redistribution lines disposed to electrically connect the third semiconductor die to the second bridge die

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS10991640B2Semiconductor packages including bridge die
Publication Date: 2021.04.27 SK HYNIX INC
  • US10991640B2 patent drawing
  • US10991640B2 patent drawing
  • US10991640B2 patent drawing

AI summary

A semiconductor package includes a first semiconductor die and a stack of second semiconductor dies disposed on a package substrate. The semiconductor package further includes a first bridge die having first through vias that electrically connect the first semiconductor die to the package substrate, a second bridge die having second through vias that electrically connect the stack of the second semiconductor dies to the package substrate, and a third semiconductor die disposed to overlap with the first semiconductor die and the stack of the second semiconductor dies. Moreover, the semiconductor package further includes redistribution lines electrically connecting the third semiconductor die to the second bridge die.