Semiconductor Package Bridge Die Layout for Fine-Pitch I/O Matching
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Solution Overview
Problem
Conventional semiconductor packaging technologies face challenges in achieving high integration density and performance due to long electrical paths and difficulties in matching fine pitch I/Os of semiconductor dies with substrates, leading to increased turnaround time and yield degradation.
Innovation Solution
A semiconductor package design featuring a bridge die positioned on semiconductor dies and within a substrate cavity, with a redistribution layer structure and core balls for horizontal and vertical electrical connections, replacing traditional conductive posts and simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal posts are used to electrically connect upper and lower structures vertically, then electrical connection is achieved, but the electrical path becomes long and manufacturing complexity increases
Solution Approach 1:
The patent transitions from vertical electrical connection (metal posts extending vertically between upper and lower structures) to horizontal electrical connection (bridge die connecting semiconductor dies arranged side by side). This dimensional change eliminates the need for long vertical metal posts and their associated complex manufacturing steps including repeated exposure, development, etching, and deposition.
Solution Approach 2:
The patent extracts and eliminates the metal post structure from the packaging system. By removing the vertical metal post connection method, the invention simplifies the manufacturing process while maintaining electrical connectivity through an alternative bridge die approach that connects adjacent semiconductor dies horizontally.
2Reliability
If conventional substrate with silicon bridges is used to connect semiconductor dies, then electrical connection is achieved, but fine pitch I/Os of semiconductor dies cannot be matched with normal pitch I/Os of substrate
Solution Approach 1:
The bridge die serves multiple functions: it provides electrical connection between semiconductor dies, accommodates both fine pitch and normal pitch I/Os, and enables flexible packaging configurations. This multi-functional component resolves the pitch matching issue by acting as an intermediate interface between dies with different pitch requirements.
Solution Approach 2:
The bridge die acts as an intermediary component between semiconductor dies and the substrate. It mediates the connection by providing a transition layer that can accommodate both fine pitch I/Os of semiconductor dies and normal pitch I/Os of the substrate, eliminating the pitch matching problem.
3Quantity of substance
If semiconductor dies are arranged side by side with bridge die connection, then integration density increases, but manufacturing precision requirements increase
Solution Approach 1:
The bridge die is positioned within a cavity of the substrate, creating a nested structure where the bridge die fits into the substrate cavity. This nesting approach provides mechanical support and alignment references that facilitate precise positioning of semiconductor dies relative to the bridge die and substrate, thereby managing alignment precision requirements.
Data Source
AI summary
A semiconductor package includes: a redistribution layer structure; first semiconductor and second dies on the redistribution, the second semiconductor die positioned next to the first semiconductor die; core balls positioned on the redistribution structure and next to the first semiconductor chip die; a bridge die configured to electrically connect the first and second semiconductor dies to each other on the first and second semiconductor dies; a substrate including an upper plate portion and a sidewall portion, the upper plate portion and the sidewall portion defining a cavity, the upper plate portion positioned on the bridge die, the side wall portion positioned on the core balls, the bridge die positioned within the cavity; and a molding material configured to mold the first semiconductor die, the second semiconductor die, the core balls, and the bridge die between the redistribution layer structure and the substrate.