Bridge Die Stacked Semiconductor Package Design
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Solution Overview
Problem
Current semiconductor package technologies face challenges in reducing the size of system-in-package (SiP) while maintaining high performance, particularly in integrating multiple semiconductor chips effectively, which hinders efficient data processing and heat dissipation.
Innovation Solution
The proposed solution involves a semiconductor package design with an outer redistributed line (RDL) structure, a first semiconductor chip, a stack module with a protruding portion, and a bridge die that includes conductive through vias to electrically connect the stack module to the RDL structure, supporting the protruding portion and enhancing data transmission between chips, along with a capacitor die and inner encapsulant for improved heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple semiconductor chips are disposed side-by-side in a SiP package, then package integration density is increased, but the width of the SiP package increases
Solution Approach 1:
The patent transitions from a two-dimensional side-by-side chip arrangement to a three-dimensional stacked configuration. Multiple semiconductor chips are vertically stacked and interconnected through conductive through-vias in the substrate, enabling higher integration density without increasing the lateral footprint of the package.
Solution Approach 2:
The patent implements a nested structure where semiconductor chips are stacked vertically within the same lateral footprint. The substrate with conductive through-vias acts as a container that holds and interconnects multiple chip layers, similar to nested dolls, maximizing space utilization.
2Reliability
If a bridge die is used to support a protruding stack module, then electrical connection is achieved, but device complexity increases
Solution Approach 1:
The bridge die performs multiple functions simultaneously: it provides mechanical support for the protruding stack module, establishes electrical connections through conductive vias, and enables signal routing between different chip layers. This multi-functionality reduces the need for separate dedicated components for each function.
Solution Approach 2:
The bridge die acts as an intermediary component between the protruding stack module and the substrate. It mediates the mechanical and electrical interface, allowing the stack module to be supported and electrically connected without requiring direct complex interconnections between all components.
3Speed
If chips are closely integrated in a SiP package, then data transmission speed is improved, but heat dissipation becomes more difficult
Solution Approach 1:
The patent implements localized heat management by incorporating heat dissipation structures at specific locations near heat-generating components. The substrate and packaging materials have varying thermal properties in different regions, with enhanced heat conduction pathways directed toward heat sources, allowing efficient heat removal without compromising the close integration needed for high-speed data transmission.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables increased data transmission efficiency between semiconductor chips, reduces package size, and improves heat dissipation, thereby enhancing the performance and operational speed of the SiP by allowing parallel data transmission and minimizing thermal processing effects on memory chips.
Implementation Method 1
a bridge die stacked on the outer RDL structure to support the protruding portion of the stack module and configured to include conductive through vias electrically connecting the stack module to the outer RDL structure
Implementation Method 2
a capacitor die disposed on the inner RDL structure to be spaced apart from the second semiconductor chip and configured to include a capacitor electrically connected to the chip pads through the inner RDL structure
Data Source
AI summary
A semiconductor package includes an outer redistributed line (RDL) structure, a first semiconductor chip disposed on the outer RDL structure, a stack module stacked on the first semiconductor chip, and a bridge die stacked on the outer RDL structure. A portion of the stack module laterally protrudes from a side surface of the first semiconductor chip. The bridge die supports the protruding portion of the stack module. The stack module includes an inner RDL structure, a second semiconductor chip disposed on the inner RDL structure, a capacitor die disposed on the inner RDL structure, and an inner encapsulant. The capacitor die acts as a decoupling capacitor of the second semiconductor chip.