Bridge Interposer Eliminates TSV Leakage in Semiconductor Packages

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Solution Overview

Problem

Conventional semiconductor packaging solutions using through-semiconductor vias (TSVs) suffer from leakage and parasitic coupling issues that adversely affect electrical signals, necessitating an alternative method for providing power, ground, and input/output connections between active dies.

Innovation Solution

The implementation of a semiconductor package with a bridge interposer that eliminates the need for TSVs by using a bridge interposer with intra-interposer routing traces and conductive pillars or solder balls to connect active dies to the package substrate, enabling chip-to-chip signal communication without TSVs, and utilizing interposer dielectric materials like fiber reinforced bismaleimide triazine or polyimide films for routing traces.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If through-semiconductor vias (TSVs) are used to provide power, ground, and I/O connections, then electrical connections between active dies are achieved, but signal leakage and parasitic coupling occur that adversely affect electrical signals

Engineering Contradiction:
Improveelectrical signal qualityVSAvoidsignal leakage and parasitic coupling
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent removes the semiconductor substrate from the interposer structure, extracting the source of parasitic coupling and signal leakage. By using a substrate-less interposer with routing traces formed directly on or within dielectric layers, the design eliminates the harmful effects associated with TSVs while maintaining electrical connection functionality between active dies and package substrate

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary routing trace structure that mediates electrical connections between active dies and package substrate. Instead of direct TSV connections through semiconductor substrate, signals pass through controlled trace routes on the interposer, which acts as an intermediary that prevents parasitic coupling while enabling necessary electrical connectivity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If conventional interposers with TSVs are used, then power and ground connections are provided, but leakage through the semiconductor substrate adversely affects electrical signals

Engineering Contradiction:
Improveelectrical connection stabilityVSAvoidsignal leakage
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent extracts the semiconductor substrate from the interposer configuration, removing the medium that causes signal leakage. The power and ground connections are reimagined as trace-based conductors on a substrate-less interposer, eliminating the leakage pathway while preserving the essential power distribution function

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent substitutes the mechanical TSV penetration structure with a planar trace-based electrical connection system. Instead of vertically penetrating vias through substrate, electrical connections are achieved through laminated copper traces and conductive elements on dielectric layers, replacing the problematic mechanical through-hole structure with a surface-based conductor system

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS9431371B2Semiconductor package with a bridge interposer
Publication Date: 2016.08.30 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US9431371B2 patent drawing
  • US9431371B2 patent drawing
  • US9431371B2 patent drawing

AI summary

There are disclosed herein various implementations of semiconductor packages including a bridge interposer. One exemplary implementation includes a first active die having a first portion situated over the bridge interposer, and a second portion not situated over the bridge interposer. The semiconductor package also includes a second active die having a first portion situated over the bridge interposer, and a second portion not situated over the bridge interposer. The second portion of the first active die and the second portion of the second active die include solder balls mounted on a package substrate, and are configured to communicate electrical signals to the package substrate utilizing the solder balls and without utilizing through-semiconductor vias (TSVs).