Bridge-Leg Gate Signal Modulation for False Trigger Prevention
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Solution Overview
Problem
Circuits with switching devices in bridge-leg configuration suffer from crosstalk issues due to parasitic elements, leading to spurious voltage pulses that cause false triggering, excessive switching losses, and network oscillations, particularly in solid state electronic devices like MOSFETs, where existing solutions either limit voltage pulses or apply negative offset voltages, which can shorten device lifespan.
Innovation Solution
A signal modulation circuit with a variable resistance circuit connected between the driver circuit and the solid state electronic device, adjustable by the driver circuit to prevent spurious operation, dynamically adjusting resistance to counteract spurious voltage pulses and monitor device health, thereby extending device lifespan.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high negative gate-source voltage is applied to counteract spurious voltage pulses, then the reliability of preventing false triggering is improved, but the lifespan of the switching device deteriorates due to increased electric field stress on the gate oxide
Solution Approach 1:
The patent applies a dynamic negative offset voltage that varies with the operating state of the switching device rather than a fixed high negative voltage. The offset voltage is adjusted based on real-time detection of spurious voltage pulses, applying sufficient negative voltage only when needed to prevent false triggering, thereby reducing unnecessary electric field stress on the gate oxide and extending device lifespan
Solution Approach 2:
The patent changes the voltage parameter dynamically by detecting spurious pulses and applying a corresponding negative offset voltage. The voltage magnitude is optimized to counteract spurious pulses while maintaining gate oxide integrity, rather than using a consistently high negative voltage that would degrade the device
2Reliability
If additional power supplies and fast switching devices are used to counteract spurious voltage pulses, then the reliability of preventing false triggering is improved, but the device complexity increases
Solution Approach 1:
The patent implements a self-service mechanism where the circuit detects its own spurious voltage pulses and automatically applies the necessary negative offset voltage through integrated control logic. This eliminates the need for additional external power supplies and complex fast switching devices, reducing overall circuit complexity while maintaining reliability
Solution Approach 2:
The patent employs feedback control by detecting spurious voltage pulses and using this information to adjust the negative offset voltage applied to the gate. This closed-loop approach prevents false triggering without requiring additional complex circuitry, as the feedback mechanism is integrated into the existing driver circuit
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces spurious voltage pulses and extends the lifespan of solid state electronic devices by dynamically adjusting the off-state gate-source voltage, minimizing voltage stress on the gate oxide and reducing power losses.
Implementation Method 1
A displacement current is induced and injected into the gate of the synchronous switch through gate-source capacitance
Implementation Method 2
A negative voltage is induced across the inductance associated with the source of the synchronous switch, such as source inductance of the switch and printed circuit board trace inductance
Data Source
AI summary
A circuit includes a first and a second solid state electronic device arranged in a bridge-leg configuration, each selectively operable as a control switch and synchronous switch and each selectively operable in an ON state and OFF state. A driver circuit is operably connected with at least the first solid state electronic device for controlling operation of at least the first solid state electronic device. A signal modulation circuit is operably connected with or between the driver circuit and the first solid state electronic device and includes an input operably connected with the driver circuit, an output operably connected with the first solid state electronic device, and a variable resistance circuit operably connected between the input and the output and operably connected with the driver circuit. A resistance of the variable resistance circuit is adjustable by the driver circuit to prevent spurious operation of the first solid state electronic device.