Bridge Package Structure for Precise Multi-Die Alignment
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Solution Overview
Problem
Conventional wafer-level packaging methods face challenges in achieving precise alignment and electrical performance due to misalignment issues during semiconductor die bonding, leading to increased costs and complexity in the manufacturing process.
Innovation Solution
The method involves forming a redistribution layer, a bridge structure, and through insulator vias on a carrier before bonding semiconductor dies, allowing for controlled connection points and fine-pitch conductive bumps, which reduces misalignment and requires fewer molding and photolithography processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional wafer-level packaging methods are used, then manufacturing process is simpler, but alignment precision and electrical performance deteriorate due to misalignment issues during die bonding
Solution Approach 1:
The patent applies preliminary action by forming the bridge structure and through insulator vias on the carrier substrate before bonding the semiconductor dies. This pre-formation of interconnection structures allows for precise alignment to be established in advance, and the carrier can then be debonded and reused for subsequent die bonding operations, thereby improving alignment precision while managing manufacturing complexity
Solution Approach 2:
The patent segments the manufacturing process into distinct stages: first forming the bridge structure and through insulator vias on the carrier, then bonding dies in multiple steps. The carrier itself is segmented from the final package structure, allowing it to be debonded and reused. This segmentation enables better control over alignment precision at each stage while organizing the manufacturing process complexity into manageable segments
2Manufacturing precision
If precise alignment is achieved through conventional methods, then manufacturing costs increase and process complexity increases due to additional molding and photolithography processes
Solution Approach 1:
The bridge structure and through insulator vias are formed preliminarily on the carrier before die bonding, establishing precise alignment references in advance. This eliminates the need for additional molding and photolithography processes that would otherwise be required to achieve the same alignment precision, thereby reducing manufacturing costs while maintaining ease of manufacture
Solution Approach 2:
The patent extracts the interconnection structure formation (bridge structure and through insulator vias) from the traditional molding and photolithography processes. By forming these structures separately on the carrier before die bonding, the complex molding and photolithography steps are eliminated or simplified, reducing both manufacturing costs and process complexity while maintaining alignment precision
Data Source
AI summary
A package structure including a first semiconductor die, a second semiconductor die, a molding compound, a bridge structure, through insulator vias, an insulating encapsulant, conductive bumps, a redistribution layer and seed layers is provided. The molding compound encapsulates the first and second semiconductor die. The bridge structure is disposed on the molding compound and electrically connects the first semiconductor die with the second semiconductor die. The insulating encapsulant encapsulates the bridge structure and the through insulator vias. The conductive bumps are electrically connecting the first and second semiconductor dies to the bridge structure and the through insulator vias. The redistribution layer is disposed on the insulating encapsulant and over the bridge structure. The seed layers are respectively disposed in between the through insulator vias and the redistribution layer.