Bridge Circuit Package Layout for Two-Sided MOSFET Cooling

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Solution Overview

Problem

Existing packaged power electronic devices with high voltage and rapid switching capabilities face challenges in thermal dissipation and size optimization, particularly for large MOSFET transistors, where traditional downward dissipation methods are insufficient and lead to increased device size and potential thermal issues.

Innovation Solution

A packaged electronic device with a DBC multilayer leadframe configuration allowing upward cooling, where MOSFET transistors are arranged on two overlapping levels with drain metallizations facing differently, and a thermally conductive structure is integrated to facilitate heat dissipation from both sides, optimizing thermal conduction paths and reducing device size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If traditional downward dissipation method is used, then device structure is simple, but thermal dissipation capacity is insufficient for high-power MOSFET transistors

Engineering Contradiction:
Improvethermal dissipation capacityVSAvoiddevice structure
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The patent transitions from single-direction (downward) thermal dissipation to multi-directional (upward and downward) dissipation by arranging MOSFET transistors on two overlapping levels with drain metallizations facing different directions. This dimensional change in heat dissipation pathways significantly enhances thermal management capacity without proportionally increasing structural complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Volume of moving object

If device size is reduced for compactness, then integration density improves, but thermal dissipation becomes more difficult

Engineering Contradiction:
Improvedevice sizeVSAvoidthermal dissipation
Core Design Contradiction:
Volume of moving objectVSTemperature

Solution Approach 1:

The patent employs a nested arrangement where MOSFET transistors are positioned on two overlapping levels within a compact footprint. The first and second MOSFET transistors are nested vertically with their drain metallizations facing opposite directions, allowing heat to dissipate through multiple surfaces. This nesting strategy achieves both compact device size and enhanced thermal dissipation by utilizing three-dimensional space efficiently.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Temperature

If MOSFET transistors are arranged on two overlapping levels, then thermal dissipation paths are optimized, but manufacturing complexity increases

Engineering Contradiction:
Improvethermal conduction pathsVSAvoidassembling process
Core Design Contradiction:
TemperatureVSEase of manufacture

Solution Approach 1:

The patent segments the device into distinct functional layers: a first level with first MOSFET transistors having drain metallizations facing upward, and a second level with second MOSFET transistors having drain metallizations facing downward. This segmentation allows independent optimization of thermal pathways for each level while maintaining a systematic assembly process. The modular segmented structure facilitates manufacturing by breaking down the complex multi-level assembly into manageable stages.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides enhanced thermal dissipation capacity and compactness by allowing heat transfer from both sides of the device, addressing the limitations of traditional downward dissipation methods and ensuring efficient cooling for high-power MOSFET transistors.

Implementation Method 1

a thermally conductive structure is integrated to facilitate heat dissipation from both sides, optimizing thermal conduction paths

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS11864361B2Packaged power electronic device, in particular bridge circuit comprising power transistors, and assembling process thereof
Publication Date: 2024.01.02 STMICROELECTRONICS SRL
  • US11864361B2 patent drawing
  • US11864361B2 patent drawing
  • US11864361B2 patent drawing

AI summary

The device has a first support element forming a first thermal dissipation surface and carrying a first power component; a second support element forming a second thermal dissipation surface and carrying a second power component, a first contacting element superimposed to the first power component; a second contacting element superimposed to the second power component; a plurality of leads electrically coupled with the power components through the first and/or the second support elements; and a thermally conductive body arranged between the first and the second contacting elements. The first and the second support elements and the first and the second contacting elements are formed by electrically insulating and thermally conductive multilayers.