Bridge Package Layout Using Split Photonic and Electrical Interposers
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Solution Overview
Problem
The increasing demand for artificial intelligence computing, particularly in machine learning and deep learning, outpaces available processing capacity, necessitating the connection of many chips with low latency and high-speed data transfer, which is costly due to the high expense of photonic interposers.
Innovation Solution
A circuit package design that incorporates a photonic interposer and a second, often non-photonic interposer, allowing dies to connect to both, reducing overall costs by using smaller, less expensive interposers, and enabling both photonic and electrical data transmission through an integrated off-bridge photonic channel interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If photonic interposers are used to enable high-speed data transfer between chips, then data transfer speed is improved, but cost increases significantly
Solution Approach 1:
The patent divides the interposer functionality into separate photonic and electrical interposers. The photonic interposer handles high-speed optical data transfer, while the electrical interposer handles electrical connections. This segmentation allows each interposer to be optimized independently, reducing the overall cost compared to using a single large photonic interposer for all functions.
Solution Approach 2:
The die is designed to interface with both photonic and electrical interposers, enabling it to handle both optical and electrical data transmission. This multi-functionality allows the system to use cost-effective electrical interposers for non-critical connections while reserving expensive photonic interposers only for high-speed requirements.
2Productivity
If multiple chips are connected into a system to increase processing capacity, then processing capacity is improved, but system complexity increases
Solution Approach 1:
The patent introduces a substrate as an intermediary platform that hosts multiple dies and interposers. This substrate provides a standardized interface and routing infrastructure, simplifying the connection architecture. Instead of directly connecting multiple chips in a complex web, all connections are routed through the substrate, which manages the complexity of inter-chip communications.
3Speed
If a single large photonic interposer is used to connect multiple chips, then data transfer capability is improved, but device complexity and cost increase
Solution Approach 1:
The patent segments the interposer system into separate photonic and electrical interposers, each with dedicated functions. The photonic interposer focuses solely on optical data transfer, while the electrical interposer handles electrical connections. This functional segmentation reduces the complexity of each individual interposer compared to a single large photonic interposer that would need to handle all connection types.
Data Source
AI summary
A method of manufacturing a circuit package is described that includes connecting a photonic interposer and a second interposer, connecting a die to both the photonic interposer and the second interposer, where the die partially overlaps both the photonic interposer and the second interposer, and connecting an optical element to the photonic interposer.