Bridge-Based Packaging Direct Power Delivery
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Solution Overview
Problem
Existing 3D stacked die packages face challenges in delivering power directly to interposer dies without obstruction, which can lead to unreliable power delivery and impact the performance and reliability of the chips and systems.
Innovation Solution
The use of an elevated fanout bridge connected to a 3D chip stack, with through-silicon vias placed in the edge of the interposer die and a dummy die on top of the bridge, allows for direct power delivery to the interposer die without obstruction, using copper pillars and backside bridges to transmit signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an elevated fanout bridge is used to connect chips in a 3D stacked die package, then signal transmission between chips is enabled, but power delivery to the interposer die is obstructed
Solution Approach 1:
The patent introduces a lateral power delivery path through the edge of the interposer die, moving power delivery from a vertical path (through the bridge) to a lateral path (along the edge). This dimensional change allows power to bypass the bridge obstruction and reach the interposer die without modifying the elevated fanout bridge structure.
Solution Approach 2:
The patent uses the edge region of the interposer die as an intermediary structure for power delivery. By placing power delivery structures (such as copper pillars or through-silicon vias) at the edge of the interposer die, power can be delivered laterally to reach the interposer die without being blocked by the elevated fanout bridge in the center.
2Reliability
If through-silicon vias are placed in the center of the interposer die, then power delivery path is created, but the elevated fanout bridge blocks the power delivery
Solution Approach 1:
The patent shifts the power delivery location from the center (vertical dimension blocked by bridge) to the edge (lateral dimension accessible). This allows through-silicon vias or copper pillars to be placed at the edge of the interposer die where they are not obstructed by the elevated fanout bridge, enabling direct power delivery to the interposer die.
3Reliability
If the bridge structure is removed to allow direct power delivery, then power delivery reliability improves, but signal transmission between chips is lost
Solution Approach 1:
The patent segments the interposer die into different functional regions: the center region contains the elevated fanout bridge for signal transmission, while the edge region contains power delivery structures (through-silicon vias or copper pillars). This segmentation allows both signal transmission and power delivery to coexist without interference, maintaining the bridge for signals while providing direct power delivery at the edges.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the reliability and performance of the chips and systems by ensuring uninterrupted and reliable power delivery to sensitive analog circuitry, reducing the risk of failure conditions and communication retries.
Implementation Method 1
power can be delivered directly below to various elements of interposer die 204 (e.g., PHYs for sending signals to connected module 206) avoiding extra impedance and routing (e.g., horizontal routing)
Implementation Method 2
through-silicon vias can be placed in the edge of the interposer die, and additional through-silicon vias can be placed in a dummy die on top of the elevated fanout bridge
Data Source
AI summary
The disclosed computer-implemented apparatus for bridge-based packaging with direct power delivery can include an first layer stacked on a second layer. The second layer can include an interposer die and a connection die. The first layer can include a chiplet die positioned above the interposer die and a first-layer bridge die spanning across the interposer die and the connection die. The interposer die can include a set of physical interfaces and a set of routing features configured to route signals from the set of physical interfaces to the first-layer bridge die. Various other apparatuses, systems, and methods of manufacture are also disclosed.