Bridge-Driven Signal Interface for Smooth Edge Timing
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Solution Overview
Problem
Existing signal transmission interfaces struggle to smoothly regulate the rising and falling times of output signals, leading to signal reflection issues and increased manufacturing costs due to the need for larger chip areas.
Innovation Solution
A signal transmission interface comprising bridge circuits and gate control circuits, such as low-pass filters, charge pumps, or switched capacitors, to control the timing of input signals, ensuring smooth rising and falling times without significantly increasing chip area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If output impedance control is used to improve signal quality, then signal reflection is reduced, but rising and falling times cannot be smoothly regulated
Solution Approach 1:
The patent divides the output driver into separate push (upper bridge) and pull (lower bridge) circuits, each controlled independently by dedicated gate control circuits. This segmentation allows independent optimization of rising and falling times without compromising signal quality, resolving the contradiction between signal reflection reduction and smooth timing regulation.
2Reliability
If slower rising or falling times are used to smooth signal transitions, then signal reflection is reduced, but chip area increases
Solution Approach 1:
The patent employs dynamic control of the push and pull circuits through gate control circuits that adjust the timing of signal application. This dynamic approach enables smooth rising and falling times without requiring larger transistor sizes or additional circuit elements, maintaining compact chip area while achieving signal transition control.
Data Source
AI summary
The present invention provides a signal transmission interface including an upper bridge circuit, a lower bridge circuit, a first gate control circuit and a second gate control circuit is disclosed. The upper bridge circuit is configured to selectively couple a supply voltage to an output terminal of the signal transmission interface, and the lower bridge circuit is configured to selectively couple the output terminal of the signal transmission interface to a ground voltage. The first gate control circuit is configured to receive an input signal and control a timing of the input signal being applied to the upper bridge circuit. The second gate control circuit is configured to receive the input signal and control a timing of the input signal being applied to the lower bridge circuit.