Broadband Frequency Tripler Using Harmonic Shaping and Mixing
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Solution Overview
Problem
Existing frequency triplers, whether diode-based or transistor-based, face challenges in achieving a balance between conversion gain, bandwidth, and power efficiency, with diode triplers having high conversion loss and requiring additional amplifiers, and transistor triplers offering narrow bandwidths.
Innovation Solution
A broadband frequency tripler is designed with four cascaded stages: a harmonic generator, a passive filter, a mixer, and an attenuator, utilizing a common-emitter transistor pair and coupled transmission lines to manipulate harmonic signal powers and suppress undesired harmonics, ensuring a flat output power across a wide frequency range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a frequency tripler is built using diodes, then a wide bandwidth can be achieved, but the conversion loss becomes large and high input power is required
Solution Approach 1:
The frequency tripler is divided into multiple stages: a first stage for generating harmonics, a second stage with a passive filter for shaping harmonic signals, a third stage for mixing, and a fourth stage for suppression. This segmentation allows each stage to be optimized for its specific function, achieving wide bandwidth while reducing overall conversion loss.
Solution Approach 2:
The patent employs a passive filter with a frequency response that has either a peak or a dip at the upper frequency end of the input signal range. This parameter change in the filter's frequency response characteristics enables the 1st and 2nd order harmonic signals to be shaped appropriately, maintaining wide bandwidth while improving conversion gain.
2Loss of energy
If a frequency tripler is built using transistors, then positive conversion gain can be achieved, but the bandwidth becomes narrow
Solution Approach 1:
The transistor-based frequency tripler is segmented into four functional stages, with the passive filter stage specifically designed to shape harmonic signals across a wide frequency range. This segmentation allows the transistor to provide gain while the filter maintains broadband performance.
Solution Approach 2:
A passive filter is introduced as an intermediary component between the harmonic generation stage and the mixing stage. This filter mediates the signal transformation by shaping the 1st and 2nd order harmonic signals, enabling the system to achieve both positive conversion gain and wide bandwidth.
3Power
If additional power amplifiers are added to boost input and output power in diode triplers, then the required power levels are achieved, but the DC power consumption increases significantly
Solution Approach 1:
The frequency tripler design enables the signal to be amplified and processed through the four stages without requiring external power amplifiers. The transistor-based active circuitry and passive filter work together to provide the necessary power boosting internally, eliminating the need for additional DC-powered amplifier stages.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves 0 dB conversion gain with low input power, maintaining a wide bandwidth while effectively suppressing undesired harmonics, outperforming prior art in terms of conversion gain and power efficiency.
Implementation Method 1
a passive filter, wherein a frequency response of the passive filter has either a peak or a dip at an upper frequency end of a frequency range of the input signal such that at output of the second stage, either a power of the 1 st order harmonic signal decrease and a power of the 2nd order harmonic signal increases when the input signal frequency increases
Implementation Method 2
a third stage configured to mix the 1st and the 2nd order harmonics signals to generate 3rd order harmonic signals
Implementation Method 3
a fourth stage configured to suppress the 1st and even-order harmonics signals and output a signal dominated with a frequency 3 times of the input signal frequency
Data Source
AI summary
A frequency multiplier (200) generates an output signal with a frequency 3 times of the input signal frequency. The frequency multiplier (200) comprises four cascaded stages. A first stage (201) is configured to receive an input signal and generate harmonics signals of the input signal. A second stage (202) is a passive filter, a frequency response of the passive filter has either a peak or a dip around an upper frequency end of a frequency band of the input signal. A third stage (203) is configured to mix the 1st and the 2nd order harmonics signals to generate 3rd order harmonic signals. A fourth stage (204) is configured to suppress the 1st and even-order harmonics signals and output a signal dominated with a frequency 3 times of the input signal frequency.