Broadcast Read Requests on Ring Bus for Logic Modules
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current integrated circuit systems require significant processing resources and time to update or read configuration registers across multiple identical logic modules, such as those in network switches, due to the need for individual writes or reads to each module.
Innovation Solution
Implementing a broadcast mechanism on a ring bus that allows a single write or read request to be transmitted to multiple logic modules, with each module determining if it is targeted and processing the request accordingly, reducing the need for individual transactions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If individual write requests are sent to each logic module to update configuration registers, then each module can be updated accurately, but the processing time and resource usage increase significantly
Solution Approach 1:
Multiple individual write requests to different logic modules are merged into a single broadcast write request. The bus controller transmits one request containing a broadcast address that matches multiple logic modules, allowing simultaneous updates across multiple modules without requiring separate transactions for each module.
Solution Approach 2:
The write request mechanism is enhanced to serve multiple functions: it can address individual logic modules or broadcast to multiple modules simultaneously by setting a broadcast address bit. This universal approach allows the same request structure to handle both individual and bulk updates, reducing the need for separate processing paths.
2Measurement precision
If individual read requests are sent to each logic module to retrieve statistics, then accurate data is obtained from each module, but the number of transactions and processing overhead increase
Solution Approach 1:
Multiple individual read requests to different logic modules are merged into a single broadcast read request. The bus controller transmits one request with a broadcast address that matches multiple logic modules, and each matching module responds with its statistics data, reducing the total number of transactions required.
Solution Approach 2:
The read request structure is copied and distributed to multiple logic modules simultaneously through the broadcast mechanism. Each logic module receives an identical request structure and responds independently, allowing parallel data retrieval without requiring the controller to manage complex individual transaction sequences.
3Reliability
If multiple individual transactions are used to access registers across multiple logic modules, then each access is precise, but the processing resource usage increases
Solution Approach 1:
Multiple individual transactions are merged into a single broadcast transaction that simultaneously targets multiple logic modules. This reduces the total number of transaction cycles required, thereby reducing processing resource usage and energy consumption while maintaining precise register access through address matching.
Data Source
AI summary
A bus controller is configured to transmit a broadcast read request on at least one bus. The broadcast read request includes an address. A first logic module determines that the broadcast read request is targeting the first logic module. The first logic module reads a first value from a first register included in the first logic module. The first register is specified by the address included in the broadcast read request. The first value is transmitted onto the at least one bus. A second logic module determines that the broadcast read request is targeting the second logic module. The second logic module reads a second value from a second register included in the second logic module. The second register is specified by the address included in the broadcast read request. The second value is transmitted onto the at least one bus.