Steep-Switch FET with BRS and Ferroelectric Gate

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Solution Overview

Problem

Conventional Field Effect Transistors (FETs) are limited by a thermally restricted subthreshold slope of 60-70 mV per decade, which hinders arbitrarily fast transitions between 'OFF' and 'ON' states, leading to a trade-off between low power and high performance.

Innovation Solution

Integration of a Bi-Stable Resistive System (BRS) on the Source and/or Drain and a ferroelectric material on the gate of a FET, leveraging enhanced coupling capacitance to achieve a sub-thermal subthreshold slope, reducing the slope below the Boltzmann limit of 60 mV per decade.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional FET structure is used, then device simplicity is maintained, but subthreshold slope is limited to 60-70 mV per decade due to thermal restrictions

Engineering Contradiction:
Improvesubthreshold slopeVSAvoidtransistor structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent employs composite materials by integrating a bi-stable resistive system (BRS) layer with conventional FET structures. The BRS material, positioned between the source/drain and channel, combines with the ferroelectric gate to create a composite device that achieves sub-thermal subthreshold slope through the synergistic interaction of resistive switching and negative capacitance effects.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The bi-stable resistive system acts as an intermediary element between the source/drain contacts and the channel region. This intermediate layer modulates carrier injection into the channel, enabling precise control of the subthreshold slope by switching between high-resistance (OFF) and low-resistance (ON) states, thereby achieving slopes below the thermal limit.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If faster transitions between OFF and ON states are achieved, then performance is improved, but power consumption increases due to trade-off between low power and high performance

Engineering Contradiction:
Improvetransition speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent utilizes phase transitions in the bi-stable resistive system material, which can switch between distinct resistance states (high and low) through controlled electrical stimulation. This phase-like switching enables abrupt transitions between OFF and ON states with minimal energy input, achieving fast switching speeds while maintaining low power consumption through the non-volatile nature of the resistive states.

Inventive Principle:
Principle #36Phase transitions

Solution Approach 2:

The invention replaces conventional charge-based switching mechanisms with a resistive switching mechanism. Instead of relying on continuous charge accumulation and depletion in the channel, the BRS system uses resistance state transitions to control current flow, enabling faster and more energy-efficient switching by eliminating the need for continuous power supply to maintain state.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Manufacturing precision

If bi-stable resistive system and ferroelectric material are integrated, then subthreshold slope is reduced below 60 mV per decade, but device fabrication complexity increases

Engineering Contradiction:
Improvesubthreshold slopeVSAvoidfabrication process
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by forming the bi-stable resistive system layer during the gate stack formation process, before final contact fabrication. The BRS material is deposited and patterned as part of the gate structure assembly, allowing subsequent contact holes to be formed through the entire stack in a single alignment step, thereby reducing overall fabrication complexity despite the additional material layer.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The integrated BRS-ferroelectric structure serves multiple functions simultaneously: the BRS layer provides subthreshold slope control through resistive switching, the ferroelectric gate provides negative capacitance for enhanced gate control, and their combination enables both low-power operation and fast switching. This multi-functionality is achieved within a unified device structure that can be fabricated using standard semiconductor processing techniques with minimal additional steps.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The integration of a BRS and ferroelectric material enables a steep-switching FET with reduced OFF-state leakage and increased ON-state current ratio, facilitating energy-efficient transitions and improved performance beyond conventional MOSFETs.

Implementation Method 1

Integration of a Bi-Stable Resistive System (BRS) on the Source and/or Drain and a ferroelectric material on the gate of a FET, leveraging enhanced coupling capacitance to achieve a sub-thermal subthreshold slope

Methodology Applied
Scientific EffectNegative capacitance: Capacitance

Implementation Method 2

a bi-stable resistive system (BRS) material deposited in the contact recess in contact with the portion of the source/drain contact. A portion of the source/drain contact, the BRS material, and a portion of the metallization layer contact form a reversible switch

Methodology Applied
Scientific EffectResistive switching: Electrical Resistance

Data Source

PatentUS10170520B1Negative-capacitance steep-switch field effect transistor with integrated bi-stable resistive system
Publication Date: 2019.01.01 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10170520B1 patent drawing
  • US10170520B1 patent drawing
  • US10170520B1 patent drawing

AI summary

Fabricating a negative capacitance steep-switch transistor includes receiving a semiconductor structure including a substrate, a fin, a source/drain, a gate, a cap disposed upon the gate, a trench contact disposed upon the source/drain, and an inter-layer dielectric. A source/drain recess is formed in the inter-layer dielectric extending to the trench contact, and a gate recess is formed in the inter-layer dielectric extending to the gate. A ferroelectric material is deposited within the gate recess, and a source/drain contact is formed within the source/drain recess. A gate contact is formed within the gate recess, and a contact recess is formed in a portion of the source/drain contact. A bi-stable resistive system (BRS) material is formed in the contact recess, and a metallization layer contact is formed upon the BRS material. A portion of the source/drain contact, the BRS material, and a portion of the metallization layer contact forms a reversible switch.