BS-PDN Power Switch Layout for SRAM Power Delivery
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Solution Overview
Problem
There is a lack of detailed technical studies on how to arrange power switch circuits in semiconductor devices with a Backside-Power Delivery Network (BS-PDN) provided on the back surface of the substrate, which affects the efficient layout and operation of semiconductor devices like SRAM.
Innovation Solution
The semiconductor device incorporates a power switch circuit with a switch transistor and control circuit between the first and second power supply lines, utilizing a via to connect power supply lines on the top and back surfaces of the substrate, allowing for efficient power supply management and reduced chip size by arranging the power switch circuit in a separating area between the bit cell and peripheral circuit areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power supply lines are arranged separately in bit cell area and peripheral circuit area, then power supply management is improved, but layout area increases due to separating area
Solution Approach 1:
The patent extends power supply lines from the top surface to the back surface of the substrate, utilizing the third dimension (depth) to resolve the layout conflict. By providing power supply lines on both surfaces and connecting them through vias, the design eliminates the need for a separating area on the top surface while maintaining proper power supply separation between bit cell and peripheral circuit areas.
2Power
If via is used to connect power supply lines on top and back surfaces, then power supply capability is improved, but manufacturing complexity increases
Solution Approach 1:
The power supply system is segmented into top surface power supply lines, back surface power supply lines, and interconnecting vias. This segmentation allows each component to be optimized independently - top and back surface lines can be routed separately to serve different functional areas, while vias provide controlled connections between surfaces, improving overall power supply capability without requiring complex monolithic structures.
3Reliability
If power switch circuit is provided between power supply lines, then power supply control is improved, but interconnect resistance increases
Solution Approach 1:
The back surface power supply lines act as intermediaries that reduce the resistance path between the power switch circuit and the bit cell area. By routing power supply lines on the back surface and connecting them through vias, the design creates lower-resistance power distribution paths compared to using only top surface interconnects, thereby reducing the harmful effect of interconnect resistance while maintaining power supply control.
Data Source
AI summary
A semiconductor device includes first and second power supply lines and first and second ground lines provided on a first surface of a substrate; a third power supply line provided on a second surface of the substrate, and connected to the first power supply line through a via; a fourth power supply line; a first area including the second power supply line, the first ground line, the third power supply line; a second area including the fourth power supply line and the second ground line; a third area positioned between the first area and the second area in plan view; and a power switch circuit including a switch transistor connected between the first power supply line and the second power supply line.