Block Shift SRAM for Autonomous Data Shifting

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Solution Overview

Problem

Conventional memory systems require external processors to shift data, leading to speed limitations and proportional time increases with the amount of data being shifted, making large data transfers inefficient.

Innovation Solution

The implementation of block shift shiftable memory (BS-SRAM) within the memory itself, allowing for built-in shifting of contiguous data subsets without external processor involvement, using shift logic and circuitry to perform upshifts and downshifts in constant or near-constant time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If external processors are used to shift data in conventional memory systems, then data shifting can be performed, but shifting time increases proportionally with data length and external resources are required

Engineering Contradiction:
Improveshifting timeVSAvoidexternal processor involvement
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The memory system performs data shifting operations autonomously using built-in shift logic and circuitry, eliminating the need for external processors. The memory cells themselves are configured to shift data within the array, making the memory system self-sufficient for shifting operations.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The shifting functionality is merged into the memory structure itself by integrating shift logic and circuitry directly with the memory cells. This combination allows the memory to perform shifting operations internally without requiring separate external processing resources.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If built-in shift logic is implemented in memory, then shifting time becomes independent of data length, but device complexity increases

Engineering Contradiction:
Improveshifting speedVSAvoidmemory structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory array is segmented into controllable blocks or regions that can be shifted independently. This segmentation allows the shift logic to operate on specific portions of data, managing complexity through modular control while achieving fast shifting operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory system dynamically configures shift operations based on data length and requirements, allowing flexible shifting of variable-sized data blocks. The shift logic adapts its operation to the actual data being processed, optimizing performance while managing complexity through dynamic control.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9466352B2Dynamic/static random access memory (D/SRAM)
Publication Date: 2016.10.11 HEWLETT PACKARD ENTERPRISE DEV LP
  • US9466352B2 patent drawing
  • US9466352B2 patent drawing
  • US9466352B2 patent drawing

AI summary

Dynamic/static random access memory (D/SRAM) cell, block shift static random access memory (BS-SRAM) and method using the same employ dynamic storage mode and dynamic storage mode switching to shift data. The D/SRAM cell includes a static random access memory (SRAM) cell having a pair of cross-coupled elements to store data, and a dynamic/static (D/S) mode selector to selectably switch the D/SRAM cell between the dynamic storage mode and a static storage mode. The BS-SRAM includes a plurality of D/SRAM cells arranged in an array and a controller to shift data from an adjacent D/SRAM cell in a second row of the array to a D/SRAM cell in a first row. The method includes switching the mode of, coupling data from an adjacent memory cell to, and storing the coupled data in, a selected D/SRAM cell.