Backside Illumination Sensor Pad Isolation Using Color Filter Insulation

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Solution Overview

Problem

Conventional back-side illuminated (BSI) devices require cumbersome and costly lithography steps and etching processes for pad-out and isolation, with no reliable designs for a backside seal ring.

Innovation Solution

A semiconductor device and manufacturing method that utilize color filter materials to form insulation layers on the sidewalls of openings, simplifying the process of drawing out and isolating pads and satisfying the technical requirements of a back seal ring, including the use of a metal grid with microlenses and color filter materials for pixel units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional lithography steps and etching processes are used for pad-out and isolation, then the pads can be drawn out and isolated, but the process becomes cumbersome and costly

Engineering Contradiction:
Improvepad-out and isolation processVSAvoidlithography steps and etching processes
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent merges the pad-out, isolation, and back seal ring formation into a single integrated structure formed by one lithography step and one etching process. The groove structure simultaneously serves as the isolation region and the back seal ring, eliminating the need for separate processing steps for each function.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The groove structure performs multiple functions simultaneously: it provides electrical isolation between regions, forms the back seal ring for hermetic sealing, and defines the pad-out structure. This multi-functional design reduces the overall process complexity by eliminating redundant steps.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of manufacture

If multiple lithography steps and etching processes are used, then pad-out and isolation can be implemented, but manufacturing cost increases

Engineering Contradiction:
Improvepad-out and isolation implementationVSAvoidmanufacturing cost
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent combines multiple manufacturing functions into fewer process steps, directly reducing the quantity of manufacturing operations required. By forming isolation structures and back seal rings in the same lithography and etching steps, the patent reduces process time, equipment usage, and material consumption, thereby lowering manufacturing cost.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If conventional methods are used for backside seal ring formation, then sealing can be achieved, but reliable designs are currently unavailable

Engineering Contradiction:
Improvebackside seal ring sealingVSAvoidbackside seal ring design
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent integrates the back seal ring formation with the isolation structure creation, using the same groove etching process to form both features. This unified approach ensures consistent etching depth and profile, improving sealing reliability while simplifying the design compared to separate formation processes.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent uses uniform etching parameters and material composition throughout the groove structure to ensure consistent sealing performance. The homogeneous design of the groove profile and the use of consistent materials across different regions contribute to reliable sealing without requiring complex variable design parameters.

Inventive Principle:
Principle #33Homogeneity

Data Source

PatentUS10340303B2Method and apparatus for backside illumination sensor
Publication Date: 2019.07.02 SEMICON MFG INT (SHANGHAI) CORP
  • US10340303B2 patent drawing
  • US10340303B2 patent drawing
  • US10340303B2 patent drawing

AI summary

A semiconductor device includes a device substrate having a dielectric layer and a metal wire in the dielectric layer, a first opening on the metal wire and having a bottom at a depth the same as an upper surface of the metal wire, a first insulation layer including a first color filter material on sidewalls of the first opening, a second opening disposed at opposite ends of the semiconductor device and having a bottom at a depth the same as the depth of the bottom of the first opening, and a second insulation layer including a second color filter material on sidewalls of the second opening. The first opening is for leading out the metal wire to a pad. The second opening is disposed along scribe lines. The semiconductor device simplifies the process of drawing out and isolating the pads and satisfies technical requirements of a back seal ring.