Bottom Shield Metal for Flexible Display Back Channel Control
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Solution Overview
Problem
Flexible display panels using plastic substrates face issues such as damage from laser detachment processes, back channel phenomena causing threshold voltage shifts, and parasitic capacitance leading to image sticking and reliability degradation in organic light-emitting display panels.
Innovation Solution
Incorporating a bottom shield metal (BSM) on the plastic substrate, connected to the gate, source, or drain electrodes of thin-film transistors (TFTs), which minimizes back channel formation and parasitic capacitance, and is used to prevent physical damage during substrate release and enhance transistor characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a plastic substrate is used for flexible display panels, then flexibility and light weight are improved, but the substrate is susceptible to damage from laser detachment processes and generates trapped charges causing back channel phenomena
Solution Approach 1:
A buffer layer is introduced as an intermediary between the plastic substrate and the bottom shield metal. This buffer layer serves as a protective mediator that prevents direct interaction between the laser and the TFT active layers during detachment, while also isolating the metal from trapped charges in the substrate. The buffer layer thus resolves the contradiction by mediating between the flexible substrate and the metal component.
Solution Approach 2:
The buffer layer is formed beforehand to cushion and protect the TFT active layers from laser damage during the detachment process. This prior protective measure prevents direct laser exposure to the sensitive active layers, thereby resolving the reliability issue while maintaining the flexibility benefit of using a plastic substrate.
2Reliability
If bottom shield metal is added to minimize back channel formation, then transistor characteristic stability is improved, but device complexity increases
Solution Approach 1:
The bottom shield metal layer is designed to serve multiple functions simultaneously: it acts as an electrical shield to minimize back channel formation and stabilize transistor characteristics, provides structural support, and serves as a reference plane for signal routing. By making the metal layer multi-functional, the invention improves reliability without proportionally increasing complexity.
Solution Approach 2:
The buffer layer and bottom shield metal are merged into a single integrated structure that combines the protective isolation function of the buffer with the electrical shielding function of the metal. This merging reduces the overall complexity compared to having separate independent components while achieving both protection and electrical stability.
3Reliability
If buffer layer is formed between TFT and bottom shield metal, then isolation from trapped charges is improved, but manufacturing process complexity increases
Solution Approach 1:
The buffer layer is formed by controlling the thickness and material properties of the isolation layer to optimal parameters that provide sufficient charge isolation while maintaining compatibility with existing manufacturing processes. By optimizing the parameters of the buffer layer, the invention achieves effective charge isolation without significantly complicating the manufacturing process.
Data Source
AI summary
An electronic display panel comprising a plastic substrate; a bottom shield metal (BSM) on the plastic substrate; a thin-film transistor (TFT) on the BSM, the TFT and the BSM at least partially overlapping each other; and an active buffer layer between the TFT and the BSM, wherein the BSM is connected to one of a gate electrode, a source electrode, and a drain electrode of the TFT. A bottom shield metal (BSM) on the plastic substrate, the BSM located to minimize formation of a back channel in a pixel circuit by trapped charges of the plastic substrate, the pixel circuit in a pixel area defined by a gate line and a data line on the plastic substrate, the pixel circuit on the active buffer layer including a plurality of TFTs and a plurality of component interconnecting nodes.


