BST Capacitor Hysteresis Mitigation via Segmented Biasing
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Solution Overview
Problem
BST capacitors face reliability issues due to drifts in capacitance value matching and lack of accuracy in bias voltage-to-capacitance conversion, particularly caused by hysteresis effects in ferroelectric materials, leading to non-negligible capacitance variations and reduced accuracy in radio frequency applications.
Innovation Solution
A capacitor design with a series association of capacitive elements and resistors, where bias voltages alternate between positive and negative values to stabilize capacitance, using additional capacitive elements to filter DC components and ensure reliable conversion, and a control circuit that applies differential biasing to maintain accurate capacitance settings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a BST capacitor uses a dedicated control circuit for high-voltage digital-to-analog conversion to set capacitance, then the capacitance can be adjusted for radio applications, but drift in matching between set point value and reached capacitance value reduces reliability
Solution Approach 1:
The capacitor is divided into multiple identical capacitive elements connected in series, each element being independently biased. This segmentation allows the total capacitance to be the sum of individual elements, improving linearity and reducing drift effects while maintaining adjustability through digital control of each segment.
Solution Approach 2:
A periodic biasing sequence is applied to the capacitive elements, where bias voltages are systematically varied in a predetermined pattern. This periodic action helps to linearize the capacitance-voltage relationship and reduces hysteresis effects, thereby improving the reliability of the digital-to-analog conversion.
2Adaptability or versatility
If bias voltage is applied to adjust capacitance value in BST capacitors, then capacitance can be adapted to outer environment, but hysteresis effects in ferroelectric materials cause non-negligible capacitance variations
Solution Approach 1:
A preliminary biasing sequence is applied to the capacitive elements before the actual capacitance setting operation. This preliminary action prepares the ferroelectric material by reducing hysteresis effects and stabilizing the capacitance characteristics, ensuring more accurate and stable capacitance values when the final bias voltage is applied.
Solution Approach 2:
The bias voltage parameters are systematically varied according to a predetermined sequence, changing the electrical state of the ferroelectric material in controlled steps. This parameter change approach linearizes the capacitance-voltage relationship and reduces hysteresis, improving both stability and adaptability.
3Measurement precision
If multiple capacitive elements are connected in series with bias voltage application, then capacitance conversion accuracy improves, but device complexity increases
Solution Approach 1:
The control circuit is designed to apply bias voltages to multiple capacitive elements using a unified control architecture. The same control signals and circuit topologies are reused across all elements, allowing the system to achieve high precision through multiple elements without proportionally increasing complexity, as each element is controlled in a standardized manner.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the reliability of digital set point value conversions to capacitance values, reduces hysteresis effects, and maintains accurate capacitance settings by alternating bias voltages, thereby improving the performance and stability of BST capacitors in radio applications.
Implementation Method 1
lack of accuracy in bias voltage-to-capacitance conversion, particularly caused by hysteresis effects in ferroelectric materials
Data Source
AI summary
A capacitor having a capacitance settable by biasing, including: a series association of a plurality of first capacitive elements between two first terminals defining the capacitor electrodes; and two second terminals of application of bias voltages respectively connected, via resistive elements, to the opposite electrodes of each of the first capacitive elements.