Branch Target Address Cache Lookup Reduction
Solution Overview
Problem
Conventional branch prediction techniques consume unnecessary power due to parallel lookups in the instruction cache (I-cache) and branch target address cache (BTAC), especially when there is a hit in the I-cache and a miss in the BTAC, which reduces the effectiveness of branch prediction and increases power consumption.
Innovation Solution
The method involves retrieving a branch target address from the BTAC upon an I-cache miss and storing it in the I-cache, allowing subsequent lookups to be performed non-parallel to the BTAC, thereby reducing unnecessary BTAC lookups and conserving power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If parallel lookups are performed in both I-cache and BTAC, then branch prediction coverage is improved, but power consumption increases due to unnecessary BTAC lookups
Solution Approach 1:
The patent performs I-cache lookup first before BTAC lookup. By checking the I-cache preliminarily and only proceeding to BTAC lookup when the I-cache miss occurs, the system avoids unnecessary parallel BTAC lookups that would consume power, while still maintaining branch prediction coverage when needed
Solution Approach 2:
The patent segments the lookup process into two sequential stages: first checking I-cache for instruction presence, then conditionally checking BTAC for branch target address. This segmentation allows the system to avoid unnecessary BTAC lookups for non-branch instructions, reducing power consumption while maintaining prediction accuracy
2Speed
If BTAC size is reduced to shorten critical path, then lookup speed is improved, but hit probability decreases
Solution Approach 1:
By performing I-cache lookup first as a preliminary check, the system filters out non-branch instructions before they reach the BTAC. This allows the BTAC to be smaller while maintaining effective hit probability, because the I-cache preliminary filter prevents wasted lookups that would not result in hits anyway
Data Source
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AI summary
A technique for reducing lookups to a branch target address cache (BTAC) is disclosed. In this technique, a branch target address is retrieved from the BTAC in response to a miss in looking up an instruction address in an instruction cache (I-cache). The branch target address is associated with the instruction address. The branch target address retrieved from the BTAC is stored in the I-cache. With this disclosed technique, subsequent instruction addresses are looked up in the I-cache, nonparallel to the BTAC, thus saving power by reducing needless BTAC lookups.