Branch Target Cache Augments History Buffer for Pipelined Predictors
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Solution Overview
Problem
Pipelined processors face performance losses due to stalls caused by control transfer instructions, and branch prediction accuracy is compromised when branch instructions are tightly grouped, as the branch predictor lacks the most recent history, leading to reduced prediction accuracy.
Innovation Solution
A branch predictor system that utilizes hit information from a branch target cache (BTC) as a proxy for the most recent branch history, augmenting the branch history with BTC hit information to improve prediction accuracy, especially in scenarios where branch instructions are closely packed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If branch prediction uses traditional history buffer, then prediction is made based on past branches, but the most recent branch history is delayed and unavailable when branch instructions are tightly grouped
Solution Approach 1:
The patent applies preliminary action by having the branch target cache (BTC) pre-compute and store target addresses for branch instructions before the traditional branch history buffer has the most recent history available. This allows the predictor to use the BTC's preliminary results as a proxy for missing recent history, improving prediction accuracy for tightly grouped branches without waiting for the delayed history to become available.
Solution Approach 2:
The patent introduces an intermediary mechanism where the branch target cache (BTC) serves as a mediator between the branch instruction and the traditional history buffer. The BTC provides intermediate target address information that bridges the gap caused by history buffer latency, allowing the prediction logic to function accurately even when recent branch history is not yet available in the traditional buffer.
2Productivity
If branch instructions are tightly grouped, then processor throughput is maintained, but prediction accuracy deteriorates due to lack of recent history
Solution Approach 1:
The patent merges the traditional branch history buffer approach with the branch target cache (BTC) approach to handle tightly grouped branch instructions. By combining the BTC's pre-computed target addresses with the history buffer's past branch patterns, the system maintains both high throughput for tightly grouped branches and accurate prediction through the complementary information from both structures.
Solution Approach 2:
The BTC performs preliminary computation of target addresses for branch instructions before they are fully processed by the traditional prediction mechanism. This preliminary action ensures that even when branch instructions are tightly grouped and recent history is unavailable, the predictor can still make accurate predictions using the BTC's advance computations as a proxy for the missing history.
3Productivity
If speculative execution is used beyond branch instructions, then performance increases on correct predictions, but performance loss occurs on mispredictions due to instruction flush
Solution Approach 1:
The patent implements feedback by using the branch target cache (BTC) to provide target address information that feeds into the speculative execution pipeline. This feedback mechanism allows the system to make more informed speculative execution decisions, reducing mispredictions and their associated performance penalties, while maintaining the performance benefits of speculative execution on correct predictions.
Data Source
AI summary
A method and apparatus for performing branch prediction is disclosed. A branch predictor includes a history buffer configured to store a branch history table indicative of a history of a plurality of previously fetched branch instructions. The branch predictor also includes a branch target cache (BTC) configured to store branch target addresses for fetch addresses that have been identified as including branch instructions but have not yet been predicted. A hash circuit is configured to form a hash of a fetch address, history information received from the history buffer, and hit information received from the BTC, wherein the fetch address includes a branch instruction. A branch prediction unit (BPU) configured to generate a branch prediction for the branch instruction included in the fetch address based on the hash formed from the fetch address, history information, and BTC hit information.