BTSV Test Structure Inside Deep Trench Isolation for 3D ICs
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Solution Overview
Problem
The challenge of electronic testing in 3D ICs, particularly BCD 3D ICs, is limited due to the absence of functional conductive lines in the first and second conductive layers, which hinders the formation of back-side through-substrate vias (BTSVs) necessary for circuit probe testing, leading to reduced yield and increased fabrication costs.
Innovation Solution
Incorporation of a ring-shaped deep trench isolation (DTI) structure in the semiconductor substrate, with a conductive interconnect structure and BTSVs disposed within its perimeter, allowing electrical coupling to conductive lines in the first conductive layer for effective electronic testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If 3D IC stacking is implemented to improve processing capabilities and power consumption, then integration density and performance are enhanced, but circuit probe testing becomes challenging due to absence of functional conductive lines
Solution Approach 1:
The patent applies preliminary action by forming dummy conductive lines and deep trench isolation structures during the fabrication process before the chip is completed. These structures are prepared in advance to enable subsequent BTSV formation and circuit probe testing, resolving the testing difficulty without affecting the 3D IC stacking performance
Solution Approach 2:
The patent introduces dummy conductive lines as intermediary structures that serve as targets for BTSV formation. These intermediary elements enable the testing process by providing accessible conductive paths on the back side of the chip, without interfering with the functional conductive lines of the 3D IC stack
2Ease of manufacture
If conventional 3D IC fabrication is used, then manufacturing complexity is reduced, but yield decreases and fabrication costs increase due to inability to perform circuit probe testing
Solution Approach 1:
The dummy conductive lines serve multiple functions: they act as structural placeholders during fabrication, provide targets for BTSV formation, and enable circuit probe testing. This multi-functionality allows the fabrication process to maintain simplicity while simultaneously enabling testing to improve yield and reduce costs
Data Source
AI summary
Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC includes a first deep trench isolation (DTI) structure in a substrate. A dielectric structure is over the substrate. An interconnect structure is in the dielectric structure. The interconnect structure includes a lower interconnect structure and an upper interconnect structure that are electrically coupled together. The upper interconnect structure includes a plurality of conductive plates. The plurality of conductive plates are vertically stacked and electrically coupled together. A back-side through substrate via (BTSV) is in the substrate and the dielectric structure. The BTSV extends from a conductive feature of the lower interconnect structure through the dielectric structure and the substrate. The conductive feature of the lower interconnect structure is at least partially laterally within a perimeter of the DTI structure. The BTSV is within the perimeter of the DTI structure.