Buck-Boost Converter Boot Refreshing Mode for Ripple Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Buck-boost converters face inefficiencies and high output ripple when transitioning between buck and boost modes, especially when input and output voltages are close, leading to undesirable perturbations and reduced power efficiency.

Innovation Solution

A buck-boost power converter with a switch control system that generates boot refreshing pulses to maintain active regulation, preventing duty cycle saturation and ensuring a switching frequency above audible levels by transitioning through an intermediary boot refreshing mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the converter transitions directly between buck and boost modes when input and output voltages are close, then the conversion speed is improved, but output voltage ripple increases and power efficiency deteriorates

Engineering Contradiction:
Improvetransition speedVSAvoidpower efficiency
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent introduces an intermediary boot refreshing mode between buck and boost modes. When the converter detects that input and output voltages are close (within a threshold range), it transitions to this intermediate mode which performs boot strap capacitor refreshing operations. This prevents direct mode switching that would cause high output ripple and efficiency loss, while still enabling relatively fast transitions through controlled boot refreshing pulses.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If the converter operates in direct mode switching without intermediate regulation, then the device complexity is reduced, but output voltage stability deteriorates

Engineering Contradiction:
Improvecontrol circuit complexityVSAvoidoutput voltage stability
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The patent implements dynamic mode switching based on real-time voltage monitoring. The control circuit continuously compares input and output voltages and dynamically adjusts the operating mode accordingly. When voltages are close, it activates the boot refreshing mode; otherwise, it operates in standard buck or boost mode. This dynamic adaptation maintains output voltage stability without requiring permanently complex circuitry.

Inventive Principle:
Principle #15Dynamics

3Loss of energy

If the switching frequency is allowed to drop to audible levels for efficiency, then the power efficiency is improved, but acoustic noise increases

Engineering Contradiction:
Improvepower efficiencyVSAvoidacoustic noise
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

The patent employs feedback control through PWM (pulse width modulation) that monitors the switching frequency and adjusts duty cycles to maintain operation above audible thresholds. The control circuit receives feedback about the current operating state and dynamically adjusts switching parameters to prevent frequency drop into the audible range, thereby eliminating acoustic noise while maintaining acceptable efficiency through optimized duty cycle control.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10116216B2Ultrasonic control system and method for a buck-boost power converter
Publication Date: 2018.10.30 SEMICON COMPONENTS IND LLC
  • US10116216B2 patent drawing
  • US10116216B2 patent drawing
  • US10116216B2 patent drawing

AI summary

An embodiment of a buck-boost power converter may include an inductor driver section configured to control four switches to control an output of the converter, and a PWM circuit to generate a PWM control signal responsive to an output level of the output. An embodiment of a switch control is configured to, when an on time of the second switch becomes less than a specified entry value, force the third switch to generate boot refreshing pulses with an on time of a specified duration value at a rate more than a specified frequency, and when an on time of the third switch becomes less than the specified entry value, force the second switch to generate boot refreshing pulses with an on time of the specified duration value at the rate more than the specified frequency.