Buck-Boost Converter Control Using Dual Timers for Seamless Mode Transitions
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Solution Overview
Problem
Conventional four-switch buck-boost converters have low efficiency and struggle to smoothly transition between buck, boost, and buck-boost modes under varying input voltages, particularly with the emergence of USB Type C standards where input voltage ranges from 3.5 V to 20 V, requiring improved control schemes for stable output voltage.
Innovation Solution
A buck-boost converter with a constant on-time control scheme using two timers to determine switch turn-on times based on proportional signals to the output and input voltages, allowing seamless transitions between operating modes by eliminating the need for a fixed clock signal and simplifying control circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional four-switch buck-boost converter control schemes are used, then the converter can operate under varying input voltages, but the efficiency is low and transient response is slow
Solution Approach 1:
The patent implements dynamic mode switching between buck, boost, and buck-boost operations based on real-time input voltage conditions. The converter automatically transitions between different operating modes to optimize efficiency across the wide input voltage range (3.5V to 20V), rather than being fixed in a single mode. This dynamic adaptation resolves the contradiction by selecting the most efficient mode for each operating condition while maintaining fast transient response capability.
Solution Approach 2:
The patent changes the control parameter from fixed-frequency PWM to constant on-time control with variable switching frequency. By making the on-time constant and allowing the switching frequency to vary dynamically, the converter achieves both high efficiency (reduced switching losses at light loads) and fast transient response (predictable on-time for quick voltage correction). This parameter change resolves the efficiency-speed tradeoff.
2Device complexity
If fixed clock signal based control is used, then switching frequency is stable, but the control circuit complexity increases and mode transitions are not smooth
Solution Approach 1:
The patent removes the fixed clock signal from the control circuit, extracting this element that caused complexity. Instead of using a clock-based PWM controller, the design uses a simple on-timer that generates constant on-time intervals. This extraction of the clock signal simplifies the control circuit while enabling smooth mode transitions through natural frequency adaptation.
Solution Approach 2:
The constant on-time control mechanism serves multiple functions simultaneously: it provides stable switching during buck mode, enables smooth transitions to boost mode, and maintains efficiency across varying loads. This universal control approach replaces the need for separate control circuits for different modes, reducing overall complexity while ensuring stable operation.
3Device complexity
If energy is stored in the inductor first before transferring to output, then the converter topology is simple, but the efficiency is reduced
Solution Approach 1:
The patent implements dynamic topology switching where the inductor's role changes based on operating mode. In buck mode, the inductor stores energy temporarily before output. In boost mode, the inductor stores energy from the input before transferring to output. In buck-boost mode, the inductor acts as an energy transfer bridge. This dynamic reconfiguration of the inductor's function maintains topology simplicity while optimizing energy transfer efficiency for each mode.
Data Source
AI summary
An apparatus includes a buck-boost converter comprising a buck portion and a boost portion connected in cascade, and a controller comprising a first timer and a second timer, wherein the first timer is configured to determine a turn-on time of a high-side switch of the buck portion, and wherein the first timer determines the turn-on time of the high-side switch of the buck portion based on a comparison between a first signal and a second signal, and wherein the first signal is proportional to an output voltage of the buck-boost converter and the second signal is generated based on a signal proportional to an input voltage of the buck-boost converter, and the second timer is configured to determine a turn-on time of a low-side switch of the boost portion.