Buck-Boost Converter Current Control for Stable Mode Transitions
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Solution Overview
Problem
Buck-boost converters using peak current mode control experience instability during transitions between operating modes due to the COMP signal's inability to quickly adjust, leading to fluctuations in output voltage.
Innovation Solution
A four-switch buck-boost converter system with a clock generator, error amplifier, offset generator, and comparator, utilizing a variable gain amplifier and offset voltages to stabilize the error signal during mode transitions by adjusting current sense gains and subtracting offset voltages from the COMP signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If peak current mode control is used in buck-boost converters, then transient response speed and current limiting are improved, but stability during operating mode transitions deteriorates due to COMP signal adjustment delay
Solution Approach 1:
The patent applies preliminary action by detecting the operating mode in advance and pre-adjusting the COMP signal through an offset voltage before the mode transition occurs. The offset generator circuit prepares the appropriate compensation offset based on the current operating mode (buck, boost, or buck-boost), ensuring the error amplifier is already configured correctly when the transition happens, thereby preventing output voltage instability.
Solution Approach 2:
The patent changes the parameter of the COMP signal by adding a variable offset voltage that depends on the operating mode. The error amplifier's compensation parameter is dynamically adjusted by selecting different offset voltages (Vos1, Vos2, or zero) based on whether the converter is in buck mode, boost mode, or buck-boost mode, allowing the system to maintain stability across different operating conditions.
2Device complexity
If standard feedback and compensation circuit is used, then circuit simplicity is maintained, but ability to quickly adjust COMP signal during mode transitions deteriorates
Solution Approach 1:
The patent introduces an intermediary offset generator circuit that mediates between the standard feedback network and the error amplifier. This offset generator acts as a bridge by providing pre-calculated compensation offsets that the error amplifier can immediately apply, eliminating the need for the feedback circuit to slowly adjust during mode transitions while maintaining overall circuit simplicity.
Solution Approach 2:
The patent segments the compensation function into two independent parts: the standard feedback network that maintains overall voltage regulation, and the offset generator that provides rapid mode-specific compensation adjustments. By separating these functions, the system achieves both circuit simplicity and fast response during mode transitions.
Data Source
AI summary
An apparatus includes a clock generator configured to generate a set signal fed into a set input of a latch, an error amplifier configured to generate a COMP signal, an offset generator configured to generate different offset voltages, and a comparator configured to generate a reset signal fed into a reset input of the latch, wherein a non-inverting input of the comparator is configured to receive a signal equal to a sum of a current sense signal and a slope compensation signal, and wherein the current sense signal is equal to a current flowing through a power converter times an adjustable gain, and an inverting input of the comparator is configured to receive an error signal, and wherein the error signal is equal to the COMP signal minus an offset voltage generated by the offset generator.