Buck-Boost Converter Control for Smooth Mode Transitions

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Solution Overview

Problem

Buck-boost power converters experience overshoots and undershoots during transitions between operation modes due to abrupt changes in voltage conversion ratios and discontinuities in error signal adjustments.

Innovation Solution

A control unit that manages transitions between buck, buck-boost, and boost modes by using a timer and peak current events to synchronize state durations, ensuring smooth mode changes without voltage disruptions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the power converter transitions between operation modes (buck, buck-boost, boost) to adapt to varying battery voltages, then the adaptability is improved, but output voltage stability deteriorates due to overshoots and undershoots

Engineering Contradiction:
Improveoperation mode adaptabilityVSAvoidoutput voltage stability
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The control unit starts a timer upon detecting a peak current event, and before the timer expires, it determines whether to transition modes based on whether the clock signal occurs prior to the timer signal. This preliminary timing preparation allows the system to anticipate and smoothly execute mode transitions, preventing abrupt changes that cause voltage overshoots and undershoots.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The power converter dynamically switches between buck, buck-boost, and boost modes based on real-time comparison of clock signal and timer signal timing. The control unit adjusts the operation mode dynamically by detecting peak current events and evaluating signal timing relationships, enabling adaptive voltage regulation while maintaining stability during transitions.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If the power converter operates in buck mode with simple switching, then the device complexity is reduced, but the ability to maintain stable output voltage across varying input voltages is limited

Engineering Contradiction:
Improvecontrol circuit complexityVSAvoidvoltage regulation range
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The control unit implements a universal timing-based control mechanism that manages three different operation modes (buck, buck-boost, boost) through a unified approach using clock signals, timer signals, and peak current detection. This multi-functional control system handles various voltage conversion scenarios with a single integrated control logic, expanding the voltage regulation range without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The control unit changes operational parameters by switching between different modes based on the timing relationship between clock and timer signals. When the clock signal occurs prior to the timer signal, the system transitions from buck mode to buck-boost mode, adjusting the voltage conversion ratio parameter to maintain stable output across varying input voltages.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250385608A1Control unit and method for operating a power converter in a buck-boost mode
Publication Date: 2025.12.18 RENESAS DESIGN (UK) LTD
  • US20250385608A1 patent drawing
  • US20250385608A1 patent drawing
  • US20250385608A1 patent drawing

AI summary

A control unit for operating a power converter in a buck-boost mode is provided. The control unit is configured to, within a switching cycle, operate the power converter in an IN state starting from the beginning of the switching cycle until a timer signal of a timer occurs. The control unit is further configured to subsequently operate the power converter in a THROUGH state stating from the timer signal until a peak current event occurs. The control unit is further configured to subsequently operate the power converter in an OUT state starting from the peak current event until a clock signal occurs, which indicates an end of the switching cycle.