Buck Converter Controller Dynamic Bandwidth for Voltage Scaling
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Solution Overview
Problem
Buck converters face challenges in quickly adjusting the on-time period of the high-side FET to regulate switching frequency when the output voltage is scaled down, leading to increased ripple current and potential instability due to bandwidth issues in the control loop.
Innovation Solution
A controller with a phase frequency detection circuit, control loop filter, pulse generation circuit, and latch is implemented, which includes a time-to-digital converter and integration coefficient controller to adjust the control loop gain and bandwidth, ensuring timely adaptation of the high-side on-time period during output voltage scaling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the bandwidth of the control loop is increased to quickly adjust the on-time period, then the settling time is reduced, but the control loop becomes unstable when the slew rate of output voltage scaling is slow
Solution Approach 1:
The control loop bandwidth is made dynamic rather than fixed. The system automatically adjusts the bandwidth based on operating conditions: when output voltage scaling is detected, the bandwidth is reduced to prevent instability, and when scaling is complete, the bandwidth is increased to achieve fast settling. This dynamic adaptation resolves the contradiction between fast response and stability.
Solution Approach 2:
The bandwidth parameter of the control loop is changed based on the scaling state. When scaling is detected (through monitoring the slew rate of output voltage), the bandwidth parameter is adjusted to a lower value to maintain stability, and when scaling is complete, it is restored to a higher value for fast settling. This parameter change strategy directly addresses the technical contradiction.
2Stability of the object's composition
If the bandwidth of the control loop is decreased to maintain stability during slow voltage scaling, then stability is improved, but the adjustment speed of the on-time period decreases
Solution Approach 1:
The control loop bandwidth is made dynamic rather than fixed. The system automatically adjusts the bandwidth based on operating conditions: when output voltage scaling is detected, the bandwidth is reduced to prevent instability, and when scaling is complete, the bandwidth is increased to achieve fast settling. This dynamic adaptation resolves the contradiction between fast response and stability.
Solution Approach 2:
The control loop operates in periodic phases: during the scaling phase, it operates with reduced bandwidth for stability, and after scaling completes, it switches to high bandwidth mode for fast adjustment. This periodic switching between different operational modes allows the system to achieve both stability during scaling and fast response afterward.
3Stability of the object's composition
If the on-time period is not adjusted quickly during output voltage scaling, then control loop stability is maintained, but ripple current in the inductor increases
Solution Approach 1:
The control loop bandwidth is made dynamic rather than fixed. The system automatically adjusts the bandwidth based on operating conditions: when output voltage scaling is detected, the bandwidth is reduced to prevent instability, and when scaling is complete, the bandwidth is increased to achieve fast settling. This dynamic adaptation resolves the contradiction between fast response and stability.
Data Source
AI summary
A controller includes a phase frequency detection circuit which has a first input coupled to receive a reference clock input, a second input coupled to receive a high-side active output, and an output configured to provide a PFD output. The controller includes a control loop filter which has a first input coupled to receive a slew rate input, a second input coupled to receive the PFD output, and an output configured to provide a high-side length output. The controller includes a pulse generation circuit which has a first input coupled to receive the high-side active output, a second input coupled to receive the high-side length output, and an output configured to provide a fine pulse output. The controller includes a latch configured to provide the high-side active output responsive to a comparison output and the fine pulse output.

