Multi-phase Buck Converter Current Balancing via ON Time Adjustment

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Solution Overview

Problem

Multi-phase DC-DC power converters face challenges in achieving balanced output currents between phases, leading to uneven heat distribution and reduced performance due to the presence of significant switching ripple components, which degrades load transient response.

Innovation Solution

A multi-phase DC-to-DC buck converter system that includes current sense circuits, averaging circuits, imbalance detector circuits, and ON time generators, where the ON time is altered based on the time integral of current imbalance signals, eliminating the need for low-pass filters by integrating current imbalance signals during the ON time interval, and using multiplier-divider or multiplier circuits to normalize the current balancing loop gain.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If low-pass filters are used to achieve current balancing in multi-phase converters, then current balance between phases is improved, but load transient response is degraded

Engineering Contradiction:
Improvecurrent balanceVSAvoidload transient response
Core Design Contradiction:
Manufacturing precisionVSSpeed

Solution Approach 1:

The patent extracts and eliminates the low-pass filters from the current balancing loop, using alternative methods (current sensing and control adjustment) to achieve current balance without the filtering components that degrade transient response

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical/filter-based current smoothing approach with an electronic control approach, using control signals to directly adjust phase currents and eliminate the need for physical filtering components

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Ease of operation

If PWM control is used in multi-phase converters, then control simplicity is improved, but current sharing between phases is not achieved

Engineering Contradiction:
Improvecontrol simplicityVSAvoidcurrent sharing
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The patent introduces feedback mechanisms where current sensing circuits monitor phase currents and feed this information back to control circuits, which then adjust switching signals to achieve current balance while maintaining PWM control simplicity

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The control circuit performs multiple functions: it generates PWM signals for switching control and simultaneously processes current balance adjustments, combining simplicity with current sharing capability in a single control system

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution achieves improved load transient response and current balance between phases by eliminating the need for low-pass filters, enhancing power efficiency and reducing the adverse effects of ripple components on current balancing loops.

Implementation Method 1

a timing capacitor configured to integrate a sum of the predetermined current and a respective current imbalance signal and generate a ramp voltage

Methodology Applied
Scientific EffectCapacitance integration: Capacitance

Data Source

PatentUS10284095B1Method and apparatus for phase current balancing in multi-phase constant on-time buck converter
Publication Date: 2019.05.07 MICROCHIP TECHNOLOGY INC
  • US10284095B1 patent drawing
  • US10284095B1 patent drawing
  • US10284095B1 patent drawing

AI summary

A multi-phase DC-to-DC buck converter for receiving an input voltage and delivering an output voltage to a load by splitting the load current between a plurality of DC-to-DC buck converter cells. The converter includes a plurality of current sense circuits for sensing current in a respective converter cell, each of the current sense circuits configured to generate a respective current sense signal, an averaging circuit for receiving each of the respective current sense signals and generating an average signal, a plurality of imbalance detector circuits for comparing a respective current sense signal with the average signal and generating a respective current imbalance signal, and a plurality of ON time generators for activating a converter cell for a predetermined time interval and altering the predetermined time interval in accordance with a time integral of a respective current imbalance signal.