Buck Converter Delay Compensation for Stable PWM-PFM Switching
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Solution Overview
Problem
Switching power sources of the voltage step-down type face significant oscillations and instability when transitioning between pulse width modulation (PWM) and pulse frequency modulation (PFM) modes due to differences in error and reference voltages, particularly exacerbated by intrinsic signal propagation delays.
Innovation Solution
Applying delays to the control signals in both PWM and PFM modes to compensate for intrinsic propagation times, thereby reducing the difference between error and reference voltages and stabilizing transitions, which involves generating intermediate signals and using comparison modules to determine these delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If transitions between PWM and PFM modes are implemented without delay compensation, then the switching power supply can operate in both modes, but strong output voltage oscillations occur during mode transitions due to intrinsic signal propagation delays
Solution Approach 1:
The patent applies delay compensation to the control signal before mode transition occurs. By anticipating the intrinsic propagation delay of the error amplifier and comparator circuits, the control signal is deliberately delayed in advance to pre-position the power transistor switching state, ensuring that the output voltage remains stable during the transition from PWM to PFM mode and vice versa.
2Adaptability or versatility
If the error voltage and reference voltage are not equal during mode transitions, then the power supply can switch between PWM and PFM modes, but strong output voltage oscillations are generated
Solution Approach 1:
The patent implements preliminary anti-action by applying delay compensation to counteract the harmful effect of voltage oscillations before they occur during mode transitions. The control signal is deliberately delayed to anticipate and prevent the oscillations that would otherwise be generated by the mismatch between error voltage and reference voltage during switching between PWM and PFM modes.
3Productivity
If intrinsic signal propagation delays are present in the error amplifier and comparator, then the power supply can process signals, but the ramp voltage reaches the error voltage earlier than ideal causing transition instability
Solution Approach 1:
The patent measures the intrinsic propagation delay of the error amplifier and comparator circuits in advance and applies this delay compensation to the control signal. By performing this action beforehand, the system accounts for the finite signal processing speed of these circuits, ensuring that the ramp voltage and error voltage are properly synchronized during mode transitions, thereby improving transition reliability.
Data Source
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AI summary
The step-down switching power supply is configured to deliver an output voltage (Vout), comprising a power transistor (TP) configured to be cyclically turned on by a first control signal (SC1), and is intended to operate in pulse-width modulation (PWM) mode, in which it is configured to generate an error voltage (Verror) from the output voltage (Vout) and a reference voltage (Vref), or in pulse-frequency modulation (PFM) mode. The adjustment method includes applying, in pulse-width modulation (PWM) mode, a first delay (R1) to the first control signal (SC1), the first delay (R1) being determined to reduce the difference between the error voltage (Verror) and the reference voltage (Vref).