DC Buck Converter EMI Reduction via Digital Delay-Locked Loop

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Solution Overview

Problem

Synchronous DC-DC buck converters face challenges in reducing electromagnetic interference and maintaining efficiency as switching frequency increases, particularly due to issues with dead time management and output voltage stability when applying spread spectrum clock generation techniques.

Innovation Solution

A digital delay-locked loop and spread spectrum clock are used to control switching signal waveforms, adjusting frequency and dead time to reduce electromagnetic interference while maintaining output voltage stability and efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If switching frequency is increased to reduce inductor and capacitor sizes, then component size is reduced, but electromagnetic interference increases

Engineering Contradiction:
Improveinductor and capacitor sizeVSAvoidelectromagnetic interference
Core Design Contradiction:
Volume of moving objectVSObject-affected harmful factors

Solution Approach 1:

The patent applies spread spectrum clock generation to dynamically vary the switching frequency around a center frequency rather than using a fixed frequency. This dynamic frequency modulation spreads the electromagnetic energy spectrum, reducing peak EMI while maintaining the high switching frequency needed for compact inductor and capacitor designs

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the frequency parameter of the switching signal by modulating it with a spread spectrum technique. The switching frequency is varied within a range centered at a base frequency, which transforms the concentrated electromagnetic energy into a distributed spectrum, thereby reducing EMI while preserving the benefits of high-frequency operation

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If spread spectrum clock generation is applied to reduce electromagnetic interference, then electromagnetic interference is reduced, but output voltage stability deteriorates due to dead time management issues

Engineering Contradiction:
Improveelectromagnetic interferenceVSAvoidoutput voltage stability
Core Design Contradiction:
Object-affected harmful factorsVSStability of the object's composition

Solution Approach 1:

The patent incorporates a feedback mechanism that monitors the switching signals and adjusts the dead time dynamically based on the spread spectrum modulation. The controller compensates for frequency variations by adjusting dead time, ensuring that the duty cycle and output voltage remain stable despite the frequency modulation used for EMI reduction

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The invention applies preliminary compensation for dead time effects in the control algorithm. By anticipating the frequency variations introduced by spread spectrum modulation, the controller pre-adjusts the dead time parameters to maintain proper switch timing and preserve output voltage stability

Inventive Principle:
Principle #10Preliminary action

3Reliability

If fixed dead time is applied to switching signals, then shoot-through current is prevented, but output voltage decreases when switching frequency is spread

Engineering Contradiction:
Improveshoot-through preventionVSAvoidoutput voltage
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The patent transitions from fixed dead time to dynamic dead time adjustment. The dead time is varied in proportion to the spread spectrum frequency modulation, ensuring that the minimum off-time for preventing shoot-through is maintained while allowing the effective duty cycle to be preserved across frequency variations

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the dead time parameter dynamically based on the instantaneous switching frequency. When frequency increases, dead time is reduced proportionally, and when frequency decreases, dead time is increased, maintaining the reliability constraint while optimizing power transfer and output voltage

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9225248B2Using a digital delay locked loop synchronous direct current to reduce the electromagnetic interference-wave control method of a DC buck converter and the switching signal
Publication Date: 2015.12.29 RES & BUSINESS FOUND SUNGKYUNKWAN UNIV
  • US9225248B2 patent drawing
  • US9225248B2 patent drawing
  • US9225248B2 patent drawing

AI summary

A synchronous direct current (DC)-DC buck converter and a method of controlling the waveforms of switching signals disclosed herein. The synchronous DC-DC buck converter generates a stepped-down output voltage using a first switch configured to apply an input voltage to an inductor and a second switch configured to switch in response to a second switching signal. The synchronous DC-DC buck converter includes a sawtooth generation unit, a driver oscillating signal generation unit, a switching signal generation unit, and a phase tracking unit. The sawtooth generation unit generates a sawtooth wave. The driver oscillating signal generation unit generates an error voltage between the output voltage and a reference voltage, and compares the sawtooth wave with the error voltage, so as to generate a driver oscillating signal. The switching signal generation unit generates each of the first and second switching signals. The phase tracking unit generates the frequency setting signal.