Buck Converter Dual-Loop Control for Subharmonic Oscillation

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Solution Overview

Problem

Current mode buck converters experience instability and subharmonic oscillations, particularly at duty cycles greater than 50%, due to high gain and right-hand pole introduction in the feedback section, leading to unwanted noise in the output voltage, and require external ramp compensation which slows down the transient response.

Innovation Solution

Implementing a feedback section with two control loops: a high current level control circuit and a low current level control circuit, using a phase frequency detector and comparators to phase and frequency lock the switching transistors with an external clock signal, eliminating subharmonic frequencies and allowing automatic compensation for changes in the inductor value.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a single control loop with high gain is used in the feedback section, then the output voltage regulation is improved, but subharmonic oscillations and instability occur at duty cycles greater than 50%

Engineering Contradiction:
Improveoutput voltage regulationVSAvoidconverter stability
Core Design Contradiction:
Measurement precisionVSStability of the object's composition

Solution Approach 1:

The single control loop is segmented into two separate control loops: a high current level control loop that regulates the upper portion of the current waveform and a low current level control loop that regulates the lower portion. This segmentation allows each loop to operate with optimized gain characteristics, maintaining regulation precision while preventing subharmonic oscillations that occur in the unified single-loop system at duty cycles greater than 50%.

Inventive Principle:
Principle #1Segmentation

2Stability of the object's composition

If external ramp compensation is added to eliminate subharmonic oscillations, then converter stability is improved, but the transient response time increases

Engineering Contradiction:
Improveconverter stabilityVSAvoidtransient response time
Core Design Contradiction:
Stability of the object's compositionVSLoss of time

Solution Approach 1:

The need for external ramp compensation is eliminated by extracting and addressing the root cause of subharmonic oscillations through dual-loop control. Each loop independently regulates its respective current level with optimized compensation, removing the requirement for additional external ramp compensation circuitry that would otherwise slow down the transient response.

Inventive Principle:
Principle #2Taking out (Extraction)

3Device complexity

If the feedback section uses a single control loop, then the device complexity is reduced, but the adaptability to inductor value changes is insufficient

Engineering Contradiction:
Improvefeedback circuit complexityVSAvoidadaptability to inductor value changes
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The feedback system transitions from a static single-loop configuration to a dynamic dual-loop configuration where each loop can independently adapt to changing operating conditions. The high current level loop and low current level loop dynamically adjust their respective control parameters based on real-time current measurements, enabling the system to automatically compensate for inductor value changes without requiring manual recalibration or complex external circuitry.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8860393B2Phase lock loop controlled current mode buck converter
Publication Date: 2014.10.14 DIALOG SEMICON GMBH
  • US8860393B2 patent drawing
  • US8860393B2 patent drawing
  • US8860393B2 patent drawing

AI summary

A current mode buck converter has a power stage and a feedback stage. The power stage converts a higher power supply voltage level to a lower output voltage level. The feedback stage is connected with the power stage for controlling the levels of repetitive switching of an output current by phase and frequency locking a switching frequency of the output current to an external clocking signal. The feedback stage controls two levels of output current bounds by transforming a current error to a phase error to prevent error amplification such that an average output current remains constant at any duty cycle.