Buck DC-DC Converter Ground Voltage Drop Reduction

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Solution Overview

Problem

Existing buck DC-DC converters face inaccuracies in voltage regulation due to ground voltage drops caused by parasitic resistances from bond wires and board traces, which become more significant at lower voltages.

Innovation Solution

The implementation of a buck DC-DC converter with sample and hold circuitry using MOS transistors and capacitors to sample the output voltage during high side switch operation and employ it for error correction during low side switch operation, adjusting the duty cycle asymmetrically to compensate for parasitic resistance-induced errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional buck DC-DC converter design is used, then device simplicity is maintained, but ground voltage drop errors occur due to parasitic resistances

Engineering Contradiction:
Improvevoltage regulation accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by sampling the output voltage during the high-side switch on-time before the low-side switch operates. This sampled voltage is held in a capacitor and used during the low-side switch operation to compensate for ground voltage drops, thereby improving measurement precision without adding complex real-time correction circuits

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary sample-and-hold circuit that captures the output voltage during the high-side switch phase and provides this stored voltage reference during the low-side switch phase. This intermediary mechanism allows the system to account for ground voltage drops without requiring complex real-time measurement and correction circuits, thus improving voltage regulation accuracy while maintaining reasonable circuit complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If asymmetric duty cycle adjustment is implemented, then ground voltage drop compensation is achieved, but control circuit complexity increases

Engineering Contradiction:
Improveoutput voltage accuracyVSAvoidcontrol circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements feedback by using the sampled output voltage (held during low-side operation) to adjust the duty cycle asymmetrically. The control circuit compares the sampled voltage with a reference and modifies the low-side switch duty cycle accordingly, creating a feedback mechanism that compensates for ground voltage drops without requiring complex additional control circuits

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies dynamics by making the duty cycle adjustable and asymmetric between high-side and low-side switches. The control circuit dynamically modifies the low-side duty cycle based on the sampled voltage, allowing the system to adapt to ground voltage drop conditions while maintaining simple control circuitry through programmed adjustment rather than complex analog control

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7671574B1Ground voltage drop reduction circuit for a buck DC-DC converter
Publication Date: 2010.03.02 NAT SEMICON CORP
  • US7671574B1 patent drawing
  • US7671574B1 patent drawing
  • US7671574B1 patent drawing

AI summary

A buck DC to DC converter is arranged to more accurately regulate an output voltage by substantially eliminating a ground voltage error caused at least in part by parasitic resistance during low side conversion/regulation. During high side conduction of the high side switch, the converter employs the output voltage for error correction. And during low side conduction of the low side switch, the converter employs a sampled and held version of the output voltage for error correction which enables the converter to eliminate the ground voltage error caused by parasitic resistance.