Current-Mode Buck Converter Mode Transition Stabilization
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Solution Overview
Problem
Current-mode buck converters experience instability and oscillation when switched between pulse width modulation (PWM) and pulse frequency modulation (PFM) modes due to the lack of information carried by the constant voltage in the PFM terminal, leading to unstable output voltage.
Innovation Solution
The current-mode buck converter design includes a compensation switch that connects to either the PWM or PFM terminal based on a mode switch signal, ensuring the detection voltage carries information equal to the compensation voltage, reducing switch loss and stabilizing the transition between modes by using a second comparator to generate a sleep-trigger signal when the compensation voltage is below a threshold.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the compensation switch connects to the PFM terminal with constant voltage, then the converter operates in pulse frequency modulation mode, but the output voltage becomes unstable and oscillates due to lack of information about detection and compensation voltages
Solution Approach 1:
The patent introduces a buffer amplifier as an intermediary component between the detection voltage node and the PFM terminal. This buffer amplifier copies the detection voltage to the PFM terminal without loading the original detection circuit, ensuring that the PFM terminal receives accurate voltage information while maintaining the stability of the detection circuit. This resolves the contradiction by enabling stable PFM operation through the intermediary buffer component.
Solution Approach 2:
The patent implements a feedback mechanism where the detection voltage (which contains information about the current state) is fed to the PFM terminal through the buffer amplifier. This feedback loop ensures that the PFM mode operation is informed by the actual circuit state, preventing instability and oscillation while maintaining conversion efficiency.
2Reliability
If the compensation switch connects to the PWM terminal, then the converter operates in pulse width modulation mode with stable output, but switch loss increases during mode transitions
Solution Approach 1:
The patent applies preliminary action by pre-charging the PFM terminal through the buffer amplifier before mode transition occurs. The detection voltage is continuously available at the PFM terminal, so when transitioning from PWM to PFM mode, the compensation switch simply needs to change its connection state without dealing with large voltage differences or discharge currents, thereby reducing switch loss during transitions.
Solution Approach 2:
The buffer amplifier acts as an intermediary that prepares the PFM terminal with the appropriate voltage level before mode switching occurs. This preliminary preparation through the intermediary buffer reduces the energy dissipation in the compensation switch during mode transitions while maintaining output stability.
3Device complexity
If a constant voltage is applied to the PFM terminal, then the circuit is simple to implement, but the detection voltage loses information about the compensation voltage leading to mode oscillation
Solution Approach 1:
The buffer amplifier serves as an intermediary that copies the detection voltage to the PFM terminal without affecting the original detection circuit. This maintains the simplicity of the overall circuit architecture while preventing information loss, as the buffer provides voltage information to the PFM terminal without adding significant complexity.
Solution Approach 2:
The patent uses the buffer amplifier to create a copy of the detection voltage and deliver it to the PFM terminal. This copying mechanism preserves the information content of the detection voltage while maintaining circuit simplicity, as the buffer provides an isolated copy rather than requiring complex feedback networks or direct connections.
Data Source
AI summary
A current-mode buck converter is disclosed, wherein the current-mode buck converter operates in a pulse width modulation (PWM) mode or a pulse frequency modulation (PFM) mode. When the current-mode buck converter enters into the PFM mode, the voltage level of the parking voltage is maintained at the voltage level of compensation voltage, so as to decrease switch loss of the current-mode buck converter operating between PWM mode and PFM mode, and stabilize the output voltage of the current-mode buck converter.


