Buck Converter PCB Layout for Reduced Parasitic Losses
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Solution Overview
Problem
Power converters, particularly those used in high current and low voltage applications, suffer from parasitic losses due to current crowding and resistance, which reduce efficiency and increase power loss, especially in compact printed circuit boards (PCBs) used in devices like SFP modules.
Innovation Solution
The solution involves positioning integrated circuits with buck converter circuitry adjacent to each other on a PCB, with each integrated circuit coupled to inductors by terminals on a common side, and using charge pumps to step down the input voltage, allowing for the use of chip inductors and reducing current crowding and parasitic losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If power converters are used in high current applications with compact PCB layouts, then power density and integration are improved, but parasitic losses due to current crowding and resistance increase
Solution Approach 1:
The power converter is divided into multiple independent integrated circuits, each handling a portion of the total current. This segmentation distributes the current load across multiple devices, reducing current density and associated parasitic losses in each individual circuit while maintaining high overall power density through compact integration of multiple units.
Solution Approach 2:
Multiple integrated circuits are arranged in a two-dimensional array on the PCB rather than stacking them vertically or using a single large device. This spatial distribution across the PCB surface reduces current crowding by spreading current paths across multiple dimensions, lowering resistance and parasitic losses while achieving high power density through efficient space utilization.
2Loss of energy
If multiple integrated circuits are positioned adjacent to each other on a PCB, then current crowding is reduced and parasitic losses decrease, but device complexity and layout constraints increase
Solution Approach 1:
Multiple integrated circuits are designed with identical or standardized terminal configurations and electrical characteristics, allowing them to perform the same function simultaneously. This universality simplifies the overall system design and layout process, as identical components can be placed in standardized positions with consistent routing patterns, reducing the complexity despite the increased number of devices.
Solution Approach 2:
Each integrated circuit is designed with specific terminal arrangements optimized for its local position in the array, with terminals positioned on common sides to facilitate uniform current distribution. This local optimization of terminal placement reduces parasitic losses while maintaining manageable layout complexity through consistent design patterns across all devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces parasitic losses by minimizing current density and resistance, enhancing power conversion efficiency and allowing for more compact designs with improved performance in high current, low voltage applications.
Implementation Method 1
using charge pumps to step down the input voltage
Data Source
AI summary
An apparatus may include a printed circuit board including an integrated circuit including buck converter circuitry and an inductor coupled to the integrated circuit.