Buck Converter Gate Drive Sequencing for Lower Switching Loss
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Solution Overview
Problem
Existing electronic circuits, such as buck converters, face challenges in achieving precise timing control to minimize switching losses.
Innovation Solution
The electronic circuit comprises a first, second, and third transistor device, with the first and second devices integrated in a common semiconductor body and connected in parallel, while the third device is connected in series. A drive circuit successively switches on and off these devices with controlled delay times to optimize switching sequences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If simultaneous switching of parallel transistor devices is used, then switching speed is improved, but switching losses increase due to simultaneous conduction
Solution Approach 1:
The drive circuit switches on the first transistor device before the second transistor device, and switches off the first transistor device after the second transistor device. This preliminary action ensures that capacitances are discharged through the first device before the second device conducts, preventing simultaneous conduction and reducing switching losses while maintaining fast switching performance
2Loss of energy
If sequential switching with delay is used, then switching losses are reduced, but timing precision requirements increase
Solution Approach 1:
The drive circuit acts as an intermediary that automatically manages the timing sequence between the two parallel transistor devices. It generates the appropriate gate drive signals with built-in delay, eliminating the need for external timing components or complex control logic while ensuring precise sequential switching to minimize losses
3Loss of energy
If complex timing control circuits are added, then switching loss reduction is achieved, but device complexity increases
Solution Approach 1:
The timing control functionality is merged into the existing drive circuit that already controls the parallel transistor devices. The drive circuit is configured to inherently provide the sequential switching sequence, combining the drive function with the timing control function in a single integrated component, thus reducing overall system complexity while achieving loss reduction
Data Source
AI summary
Disclosed is an electronic circuit. The electronic circuit includes a first transistor device, a second transistor device, and a third transistor device, each having a control node and a load path. The electronic circuit further includes a drive circuit. The load paths of the first and second transistor devices are connected in parallel, the load path of the third transistor device is connected in series with the load paths of the first and second transistor devices, and the first transistor device and the second transistor device are integrated in a common semiconductor body. The drive circuit is configured, based on a control signal, to successively switch on the first transistor device and the second transistor device, so that the second transistor device is switched on when the first transistor device is in an on-state.