Buck PFC Control Circuit with Dual-Loop Overvoltage Protection

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Solution Overview

Problem

Buck power factor correction (PFC) stages have slow control loops that are incompatible with the need for fast response to overvoltage conditions, particularly at light load conditions, leading to potential component damage and inefficiencies in both light-load and high-load scenarios.

Innovation Solution

A dual-loop control circuit comprising a fast outer loop and a slow inner loop, where the fast outer loop activates under light load conditions to provide quick overvoltage protection and the slow inner loop operates under normal load conditions, with features like voltage sensing, current feedback, hysteresis, and overvoltage protection mechanisms to manage duty cycle and current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a slow control loop is used for the buck PFC stage, then appropriate power factor and line current harmonics performance are ensured, but the response to overvoltage conditions is too slow

Engineering Contradiction:
Improvepower factor and harmonics performanceVSAvoidresponse speed to overvoltage conditions
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The control loop is segmented into two independent loops: a slow inner loop (crossover frequency 10-20 Hz) that maintains power factor and harmonics performance, and a fast outer loop (crossover frequency 100-500 Hz) that provides rapid overvoltage protection. Each loop operates independently with its own error amplifier and control path, allowing simultaneous optimization for different performance criteria.

Inventive Principle:
Principle #1Segmentation

2Object-generated harmful factors

If a slow control loop is used, then current distortion is contained, but light-load performance is degraded

Engineering Contradiction:
Improvecurrent distortionVSAvoidlight-load performance
Core Design Contradiction:
Object-generated harmful factorsVSProductivity

Solution Approach 1:

The system dynamically switches between control modes based on load conditions. The fast outer loop is enabled during light-load conditions to maintain voltage regulation and prevent overvoltage, while the slow inner loop handles normal load conditions for optimal power factor correction. The dynamic element selects which loop is active based on the duty cycle threshold.

Inventive Principle:
Principle #15Dynamics

3Speed

If a fast response is implemented, then overvoltage protection is improved, but power factor and harmonics performance deteriorate

Engineering Contradiction:
Improveresponse speed to overvoltage conditionsVSAvoidpower factor and harmonics performance
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The control function is segmented between two loops with different crossover frequencies. The fast outer loop provides rapid response for overvoltage protection without affecting the slow inner loop's ability to maintain power factor and harmonics performance. The segmentation allows each loop to be optimized for its specific function independently.

Inventive Principle:
Principle #1Segmentation

4Device complexity

If a single control loop is used, then device complexity is reduced, but the system cannot simultaneously optimize for both light-load and high-load conditions

Engineering Contradiction:
Improvecontrol circuit complexityVSAvoidperformance across different load conditions
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The control system dynamically adapts its behavior based on operating conditions by enabling the fast outer loop during light-load conditions and relying on the slow inner loop during normal load conditions. This dynamic adaptation allows the system to optimize performance for different load scenarios without requiring multiple dedicated control circuits.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The dual-loop control circuit serves multiple functions: the slow inner loop handles power factor correction and harmonics control for normal operation, while the fast outer loop provides overvoltage protection and light-load optimization. This multi-functionality is achieved within a single integrated control circuit architecture.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9059640B2Control circuit for a buck power factor correction stage
Publication Date: 2015.06.16 TEXAS INSTRUMENTS INC
  • US9059640B2 patent drawing
  • US9059640B2 patent drawing
  • US9059640B2 patent drawing

AI summary

This invention relates to a control circuit for a buck power factor correction (PFC) stage. Buck PFC stages are commonly used in low cost, high efficiency power converters. These buck PFC stages are typically controlled using a very slow control loop with a crossover frequency of the order of 10 to 20 Hz. However, such a slow response is unsuitable for applications requiring overvoltage protection. The present invention overcomes the problems with the known control circuits for buck PFC stages by implementing a two stage control circuit having a fast outer loop control circuit and a slow inner loop control circuit. The fast outer loop control circuit is in operation during low load conditions and the slow inner loop control circuit is only active under load.