Buck Power Supply Negative Current Clocking for Overvoltage
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Solution Overview
Problem
Buck switching mode power supplies face inefficiencies in low-load conditions due to their inability to discharge output voltage when it exceeds the intended level, leading to complex control systems and reduced efficiency, as they typically operate in PWM mode for high loads and switch to PFM mode for low loads, requiring sensing systems to decide the operational mode.
Innovation Solution
The solution involves controlling the NMOS transistor to allow negative current flow when the output voltage is higher than intended, generating a clock signal based on overvoltage conditions, and using a local oscillator with frequency proportional to the overvoltage magnitude to manage current flow, enabling the buck power supply to discharge excess voltage and maintain high efficiency in PFM mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the NMOS transistor is turned off when inductor current reaches zero (active diode behavior), then efficiency is improved by preventing negative current flow, but the power supply cannot discharge excess output voltage when it exceeds the intended level
Solution Approach 1:
The patent makes the NMOS transistor's off-state dynamic rather than static. The transistor switches between blocked and conductive states based on real-time comparison between output voltage and reference voltage. When Vout exceeds Vref, the transistor activates to discharge excess voltage, then deactivates when voltage returns to target, optimizing efficiency while maintaining adaptability.
Solution Approach 2:
The patent implements a feedback mechanism using a comparator that continuously monitors the output voltage and compares it with a reference voltage. The comparator's output controls the NMOS transistor's gate, creating a closed-loop system that automatically regulates voltage by enabling negative current flow only when needed to maintain efficiency.
2Loss of energy
If the buck converter operates in PFM mode for low-power modes, then efficiency is improved, but the system cannot handle overvoltage conditions without complex control systems
Solution Approach 1:
The patent enables the PFM mode buck converter to self-regulate overvoltage conditions using a simple comparator circuit. The system automatically detects when output voltage exceeds the reference level and activates the NMOS transistor to discharge excess voltage, eliminating the need for complex external control systems while maintaining high efficiency in low-power modes.
3Manufacturing precision
If the NMOS transistor allows negative current flow to discharge excess voltage, then voltage regulation is improved, but power is wasted when the transistor discharges the output in normal operation
Solution Approach 1:
The comparator-based feedback mechanism ensures the NMOS transistor activates only when Vout exceeds Vref, preventing unnecessary discharge and power waste. The transistor remains off during normal operation and only conducts negative current when voltage regulation is needed, optimizing both precision and efficiency.
Data Source
AI summary
A switching mode power supply (SMPS) configured for clearing an overvoltage condition. The overvoltage is determined by detecting that the output voltage has exceeded the input voltage by a limited amount. The overvoltage is cleared by repetitively turning on and then off the switches controlling the flow of energy to the SMPS in sequence until the excess charge resulting from the overvoltage is couple to circuit ground, and the output is reduced to within acceptable limits.