Buck Regulator Dynamic Clock Frequency Dropout Control

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Solution Overview

Problem

Buck regulators face dropout issues when the input voltage becomes too low, causing the output voltage to follow the input voltage and leading to regulation failure.

Innovation Solution

The implementation of a dynamic frequency control mechanism in switching regulators, which adjusts the clock signal frequency and extends the on-time of the output transistor to maintain regulation by increasing the switching period, thereby reducing dropout voltage and preventing output voltage drops.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the input voltage decreases, then the regulator operates closer to dropout conditions, but the output voltage regulation fails and output voltage drops

Engineering Contradiction:
Improveoutput voltage regulationVSAvoidinput voltage level
Core Design Contradiction:
ReliabilityVSStress or pressure

Solution Approach 1:

The patent applies dynamics by making the switching frequency variable rather than fixed. The controller dynamically adjusts the switching frequency based on the input voltage level, increasing frequency when input voltage drops to maintain adequate energy transfer and prevent dropout, thereby resolving the contradiction between maintaining regulation and operating at low input voltage

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operating parameters of the regulator by adjusting the switching frequency in response to input voltage changes. When input voltage decreases, the switching frequency is increased to compensate for reduced voltage headroom, maintaining the energy balance required for stable output voltage regulation and preventing dropout

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the switching frequency is increased to prevent dropout, then the regulator can maintain regulation at lower input voltages, but the switching losses increase

Engineering Contradiction:
Improvedropout preventionVSAvoidswitching losses
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The system dynamically adjusts switching frequency based on actual operating conditions rather than using a fixed high frequency. The frequency is increased only when and where needed to prevent dropout, and reduced when input voltage is sufficient, thereby minimizing switching losses while maintaining dropout prevention capability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The controller uses feedback from the input voltage level and output regulation status to adjust switching frequency. This closed-loop control ensures frequency is increased only when dropout is detected or predicted, and reduced when regulation is stable, optimizing the trade-off between dropout prevention and switching loss minimization

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8193798B1Buck regulators with adjustable clock frequency to achieve dropout voltage reduction
Publication Date: 2012.06.05 NAT SEMICON CORP
  • US8193798B1 patent drawing
  • US8193798B1 patent drawing
  • US8193798B1 patent drawing

AI summary

A method includes generating a drive signal for a transistor in a switching regulator. The drive signal turns the transistor on and off to generate a regulated output voltage. The drive signal is generated based on a clock signal. The method also includes dynamically decreasing a frequency of the clock signal to decrease a dropout voltage of the switching regulator. Dynamically decreasing the frequency of the clock signal can increase a duration of switching periods defined by the clock signal. The dropout voltage could have a first value proportional to TOFF<sub2>—</sub2>MIN/TON<sub2>—</sub2>MAX during shorter switching periods and a second value proportional to TOFF<sub2>—</sub2>MIN/TON<sub2>—</sub2>MAX<sub2>—</sub2>DFC during longer switching periods. TOFF<sub2>—</sub2>MIN represents a minimum amount of off-time for the transistor during each switching period, TON<sub2>—</sub2>MAX represents a maximum amount of on-time for the transistor during shorter switching periods, and TON<sub2>—</sub2>MAX<sub2>—</sub2>DFC represent a maximum amount of on-time for the transistor during longer switching periods.