Three-Level Buck Regulator Terminal Layout for Reduced Parasitics
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Solution Overview
Problem
Conventional buck converter implementations face inefficiencies due to long routing traces and increased noise coupling when capacitive and inductive elements are placed adjacent to the same side of the IC package, leading to higher routing resistance and parasitics.
Innovation Solution
A connection terminal pattern and layout for a three-level buck regulator where capacitive and inductive elements are placed on different sides of the IC package, reducing routing resistance and noise coupling by allowing shorter traces and enabling placement on the same layer without vias, thus improving power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If capacitive and inductive elements are placed adjacent to the same side of the IC package, then routing traces can be shorter, but routing resistance and parasitics increase leading to reduced power efficiency
Solution Approach 1:
The patent applies dimensional change by moving capacitive and inductive elements from the same side (2D placement) to opposite sides (spatial distribution across different dimensions) of the IC package. This spatial redistribution reduces routing resistance and parasitic coupling while maintaining acceptable trace lengths through optimized connection paths.
2Length of moving object
If capacitive and inductive elements are placed adjacent to the same side of the IC package, then routing traces can be shorter, but noise coupling increases
Solution Approach 1:
The patent extracts the harmful interaction between capacitive and inductive elements by separating them into different spatial locations (opposite sides of the IC package). This physical separation removes the noise coupling problem while the routing infrastructure maintains efficient connections through optimized trace design.
3Object-generated harmful factors
If capacitive and inductive elements are placed on different sides of the IC package, then noise coupling is reduced, but device complexity increases
Solution Approach 1:
The patent segments the placement locations into distinct regions (opposite sides of the IC package) for capacitive and inductive elements. This segmentation reduces noise coupling by creating physical separation, while the routing infrastructure is designed to handle the increased complexity through systematic trace routing and connection management.
Data Source
AI summary
Certain aspects of the present disclosure generally relate to a connection terminal pattern and layout for a three-level buck regulator. One example electronic module generally includes a substrate, an integrated circuit (IC) package disposed on the substrate and comprising transistors of a three-level buck regulator, a capacitive element of the three-level buck regulator disposed on the substrate, and an inductive element of the three-level buck regulator disposed on the substrate. In certain aspects, the capacitive element and the inductive element may be disposed adjacent to different sides of the IC package.