High-Voltage Buck Stage Using Self-Driven Stacked MOSFETs
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Solution Overview
Problem
Short-channel CMOS devices have low breakdown voltage, making them unsuitable for high voltage power-conversion regulators, and they incur significant power loss due to high gate-charge, leading to inefficiencies in DC-DC converters.
Innovation Solution
The implementation of a buck converter with a stacked MOSFET structure where power MOSFETs are self-driven without driver circuits, and some MOSFETs undergo partial gate charge/discharge through the output inductor to reduce power loss, utilizing a cascode output stage with low side and high side transistors to manage voltage and minimize driver requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If short-channel CMOS devices are used in high voltage power-conversion regulators, then device integration and scalability are improved, but breakdown voltage is insufficient and gate-charge power loss increases
Solution Approach 1:
The patent divides a single high-voltage switching operation into multiple stages by stacking several MOSFETs in series. Each MOSFET handles a portion of the total voltage, allowing the use of low-voltage short-channel CMOS devices to achieve high-voltage power conversion capability.
Solution Approach 2:
The patent transitions from single-device horizontal scaling to vertical stacking architecture. By arranging MOSFETs in series stacks, the system achieves high voltage handling capability through vertical dimension rather than relying on single-device breakdown voltage improvements.
2Volume of moving object
If short-channel CMOS devices are used in DC-DC converters, then device size and integration are reduced, but power loss due to high gate-charge increases significantly
Solution Approach 1:
The patent implements partial gate charging by allowing the gate voltage to swing only between threshold voltage and a intermediate level rather than full rail-to-rail. This partial action reduces the charge-discharge cycle energy loss while maintaining effective switching control.
Solution Approach 2:
The patent employs periodic gate charging and discharging cycles synchronized with the switching operation. By timing the gate charge/discharge events to coincide with switching transitions, the system minimizes energy loss from unnecessary charge cycles.
3Ease of operation
If traditional driver circuits are used for each power MOSFET, then transistor control is achieved, but device complexity and driver circuit requirements increase
Solution Approach 1:
The patent merges the control functions for multiple MOSFETs into a single integrated controller. The controller simultaneously manages the switching of all MOSFETs in the stack through coordinated gate voltage application, eliminating the need for separate driver circuits for each transistor.
Solution Approach 2:
The patent implements a universal controller that performs multiple functions: generating gate drive signals, managing voltage distribution across the stack, and coordinating switching operations. This single multi-functional unit replaces what would traditionally require multiple specialized driver circuits.
Data Source
AI summary
A power converter is disclosed. The power converter includes a positive power supply, an output node, first, second, and third high side transistors serially connected between the positive power supply and the output node, and a high side bias voltage generator configured to generate a high side bias voltage. A gate of the second high side transistor is connected to the high side bias voltage generator. The power converter also includes a signal driver configured to selectively connect a gate of the first transistor to either the positive power supply or the high side bias voltage generator, a switch configured to selectively connect a gate of the third transistor to the high side bias voltage generator, and a capacitor connected to the gate of the third transistor and to a source of the second high side transistor.