Buck Converter Valley Current Limit Circuit Using Capacitive Sampling
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Solution Overview
Problem
Existing buck converters face challenges in accurately sensing and limiting the valley current without requiring lossy sense resistors or complex circuitry, which can lead to instability and improper operation.
Innovation Solution
A valley current limit circuit using a sample and hold capacitor, sense FET, and phase generator to generate a negative reference voltage without the need for lossy resistors or complex circuitry, by leveraging the dual phase nature of switching converters to sample and flip the polarity of the current reference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If lossy sense resistors are used to sense valley current, then current sensing is achieved, but energy loss increases and efficiency decreases
Solution Approach 1:
The patent replaces the traditional resistive sensing mechanism with a capacitive sampling mechanism. Instead of using a sense resistor that dissipates power continuously, the invention uses a capacitor to sample the valley current voltage and transfer it to generate the current limit reference, eliminating continuous energy loss while maintaining sensing accuracy.
Solution Approach 2:
The patent introduces a sample and hold capacitor as an intermediary element between the current sensing point and the current limit reference generation. This capacitor temporarily stores the valley current information and enables its transfer without requiring a continuous resistive path, thus avoiding energy dissipation while preserving measurement information.
2Measurement precision
If complex circuitry is used to generate negative reference voltage, then accurate valley current limit detection is achieved, but device complexity increases
Solution Approach 1:
The patent employs periodic switching action during the low-side FET ON time to transfer charge from the sample and hold capacitor to generate the negative reference voltage. This periodic charge transfer mechanism simplifies the circuit by using the existing switching rhythm of the converter rather than requiring complex continuous negative voltage generation circuitry.
Solution Approach 2:
The patent makes the existing low-side FET switching operation serve dual purposes: its primary function of inductor current discharge and its secondary function of driving the sample and hold capacitor to generate the current limit reference. This self-service approach eliminates the need for separate complex negative reference generation circuitry by leveraging the converter's own switching action.
3Reliability
If traditional current limiting methods are used, then current protection is provided, but stability deteriorates due to improper operation at very low duty cycles
Solution Approach 1:
The patent performs preliminary sampling of the valley current voltage during the low-side FET ON time before the next switching cycle begins. By preparing the current limit reference in advance during this interval, the system ensures stable and accurate current protection is ready before needed, preventing instability that could occur with reactive current limiting methods at low duty cycles.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate detection of valley current limits in buck converters, ensuring stable operation without the use of lossy resistors or complex circuitry, thereby improving efficiency and reliability.
Implementation Method 1
A valley current limit circuit using a sample and hold capacitor, sense FET, and phase generator to generate a negative reference voltage
Data Source
AI summary
A valley current limit circuit of a switching regulator is provided, with the valley current limit circuit including a sample and hold capacitor. The valley current limit circuit is arranged to charge the sample and hold capacitor when a low-side switch of the switching regulator is OFF and to provide a negative reference voltage from the sample and hold capacitor when the low-side switch is ON. The valley current limit circuit includes a comparator arranged to provide a current limit reference by comparing the negative reference voltage against a switch node voltage of the switching regulator when the low-side switch is ON.