Buffer Amplifier Bias Switching for Low-Power Offset-Free Output

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Solution Overview

Problem

Conventional buffer amplifiers for liquid crystal display driver ICs face issues with high power consumption, large size, IR drop, and systematic offset due to current path switching, which complicates the layout and requires additional offset compensation.

Innovation Solution

The buffer amplifier performs DC bias switching instead of current path switching, using a configuration with first and second amplification blocks, output buffer units, and switch units to minimize power consumption and prevent size increases and systematic offsets, achieving a half-power consumption structure at the output stage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If current path switching is used to reduce power consumption, then power consumption is reduced, but device complexity and layout complexity increase

Engineering Contradiction:
Improvepower consumptionVSAvoidlayout complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

Instead of switching current paths to reduce power consumption, the patent inverts the approach by switching DC bias voltages applied to the floating bias circuit. This voltage switching mechanism achieves power reduction without requiring complex current path switching, thereby reducing layout complexity while maintaining low power consumption.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent extracts the switching operation from the current path and relocates it to the bias voltage control. By taking out the switching function from the main signal path and applying it to the bias circuit, the design achieves power reduction without complicating the main signal layout.

Inventive Principle:
Principle #2Taking out (Extraction)

2Use of energy by moving object

If current path switching is used to achieve half power consumption, then power consumption is reduced, but systematic offset increases

Engineering Contradiction:
Improvepower consumptionVSAvoidoffset deviation
Core Design Contradiction:
Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The patent inverts the switching mechanism from current path switching to bias voltage switching. This approach achieves half-power consumption while avoiding the systematic offset problems associated with current path switching, as the bias switching occurs in a controlled manner that maintains signal integrity.

Inventive Principle:
Principle #13The other way round (Inversion)

3Use of energy by moving object

If floating bias circuit is used to reduce power consumption, then power consumption is reduced, but device size increases

Engineering Contradiction:
Improvepower consumptionVSAvoiddevice size
Core Design Contradiction:
Use of energy by moving objectVSArea of stationary object

Solution Approach 1:

The patent merges the floating bias circuit with the main amplifier structure, sharing common components and pathways. This integration allows the floating bias functionality to be achieved without adding significant device area, while still providing the power reduction benefits.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10630266B2Buffer amplifier
Publication Date: 2020.04.21 DB GLOBALCHIP CO LTD
  • US10630266B2 patent drawing
  • US10630266B2 patent drawing
  • US10630266B2 patent drawing

AI summary

A buffer amplifier configured to perform voltage switching (DC bias voltage switching). The buffer amplifier includes first and second amplification blocks corresponding to first and second channels, respectively, first and second output buffer units controlled by output levels of the first and second amplification blocks, and a switch unit configured to connect or disconnect the first or second amplification block to or from the first or second output buffer unit. The switch unit includes a first switch unit configured to connect or disconnect one of the first and second amplification blocks to or from the first output buffer unit based on or in response to a control signal and a second switch unit configured to connect or disconnect another one of the first and second amplification blocks to or from the second output buffer unit based on or in response to the control signal.