Buffer Amplifier Using Differential NMOS and PMOS Feedback
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional buffer amplifiers face challenges in amplifying differential input signals without distorting them at low power consumption, often requiring larger integrated circuits due to inductor loads or increasing bias current when using resistor loads, which leads to signal distortion and increased power consumption.
Innovation Solution
A buffer amplifier design utilizing pairs of differential NMOSFETs and PMOSFETs with feedback resistors and a current source that allows the transistors to operate in the saturation region, eliminating the need for inductor or resistor loads, and allowing digital control of bias current to adjust transconductance and gain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If inductor loads are used in buffer amplifier, then power consumption is reduced, but integrated circuit size increases
Solution Approach 1:
The patent removes the inductor component from the buffer amplifier circuit entirely, extracting the problematic element that caused the area increase while maintaining the desired low power consumption through an alternative operational configuration using feedback resistors and differential transistors
Solution Approach 2:
The patent substitutes the inductor-based load with a resistor-based feedback mechanism combined with differential transistor pairs, replacing the mechanical/physical inductor component with an electronic control system that achieves the same power efficiency without the area penalty
2Area of stationary object
If resistor loads are used in buffer amplifier, then integrated circuit size is reduced, but power consumption increases and signal distortion occurs
Solution Approach 1:
The patent introduces feedback resistors that create a feedback loop to control the operation of differential transistor pairs, enabling the circuit to maintain low power consumption while using only resistor loads, thus resolving the contradiction between small size and low power operation
Solution Approach 2:
The patent changes the operational parameters of the transistors by using feedback control to maintain them in the saturation region, which allows the circuit to achieve low power consumption with resistor loads, overcoming the traditional limitation that resistor loads require high bias current
3Power
If bias current is increased to increase transconductance with resistor loads, then amplifier gain improves, but power consumption increases and voltage drops occur
Solution Approach 1:
The feedback resistors create a control mechanism that allows the amplifier to achieve high transconductance and gain without increasing the bias current, as the feedback loop dynamically adjusts the transistor operation to maintain optimal performance at low power levels
Solution Approach 2:
The patent makes the transistor operation dynamic through feedback control, allowing the transistors to operate in the saturation region with optimized transconductance that adapts to signal conditions, achieving high gain without the need for increased bias current
4Productivity
If conventional buffer amplifier designs are used, then signal amplification is achieved, but signal distortion occurs due to limited slew rate
Solution Approach 1:
The feedback resistors create a negative feedback mechanism that linearizes the amplifier response and extends the slew rate, allowing the buffer amplifier to handle large signal swings without distortion while maintaining faithful reproduction of the input signal
Data Source
AI summary
A buffer amplifier, which includes a first differential signal amplifier including first and second NMOSFETs (N-type metal-oxide semiconductor field-effect transistors) amplifying differential input signals; a second differential signal amplifier including first and second PMOSFETs (P-type metal-oxide semiconductor field-effect transistors) amplifying the differential input signals; a first feedback resistor including an end commonly connected to drains of the first NMOSFET and the first PMOSFET and the other end commonly connected to gates of the first NMOSFET and the first PMOSFET; a second feedback resistor including an end commonly connected to drains of the second NMOSFET and the second PMOSFET and the other end commonly connected to gates of the second NMOSFET and the second PMOSFET; and a current source providing a bias current for driving the first and second differential signal amplifiers, is provided.