Switched-Capacitor Buffer Amplifier for High Gain and Bandwidth

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Solution Overview

Problem

Conventional amplifier circuits, particularly those with voltage gain close to one, are limited in their ability to provide substantial voltage amplification and are often used as buffer amplifiers rather than voltage amplifiers, which restricts their application in signal amplification and other electronic systems.

Innovation Solution

The development of amplifier circuits that incorporate buffer amplifiers with high input resistance and voltage gain substantially equal to one, along with resistors or capacitors, to achieve continuous-time or discrete-time signal amplification, including embodiments that operate in sampling and amplification phases to amplify weighted sums or differences of input voltages, effectively addressing the limitations of prior art.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a buffer amplifier with voltage gain substantially equal to one is used, then the input resistance is high and the circuit is simple, but the voltage amplification capability is limited

Engineering Contradiction:
Improvecircuit complexityVSAvoidvoltage amplification capability
Core Design Contradiction:
Device complexityVSPower

Solution Approach 1:

The circuit is divided into two functional segments: a buffer amplifier stage that provides high input resistance and a gain control stage using resistors or capacitors that provides voltage amplification. The buffer amplifier (with gain substantially equal to one) is separated from the gain determination elements, allowing each segment to optimize its specific function while working together to achieve both high input resistance and substantial voltage amplification.

Inventive Principle:
Principle #1Segmentation

2Power

If a common-source amplifier is used to provide substantial voltage gain, then the voltage amplification is high, but the bandwidth is limited

Engineering Contradiction:
Improvevoltage gainVSAvoidbandwidth
Core Design Contradiction:
PowerVSSpeed

Solution Approach 1:

The invention changes the determining parameters of voltage gain from transistor characteristics (transconductance) to passive component ratios (resistor ratios or capacitor ratios). By using the relationship Av = -R1/R2 or Av = -C2/C1, the gain becomes independent of transistor parameters and frequency, thereby maintaining substantial voltage amplification while achieving wide bandwidth that extends to very high frequencies including RF ranges.

Inventive Principle:
Principle #35Parameter changes

3Power

If the voltage gain is determined by transistor transconductance, then the amplification is substantial, but the gain-bandwidth product is limited

Engineering Contradiction:
Improvevoltage gainVSAvoidgain-bandwidth product
Core Design Contradiction:
PowerVSProductivity

Solution Approach 1:

The invention substitutes the active transistor-based gain mechanism with a passive component ratio mechanism. Instead of relying on transistor transconductance (gm) which limits bandwidth, the gain is determined by the ratio of passive resistors or capacitors. This substitution eliminates the fundamental trade-off between gain and bandwidth, enabling both high voltage gain and wide bandwidth simultaneously, thus achieving a very high gain-bandwidth product.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentEP3576301B1Buffer amplifier circuit
Publication Date: 2024.02.28 LEE HAE SEUNG
  • EP3576301B1 patent drawingFigure 1
  • EP3576301B1 patent drawingFigure 2
  • EP3576301B1 patent drawingFigure 3

AI summary

The invention relates to a discrete-time amplifier circuit (300) operable in a sampling phase and an amplification phase. The amplifier circuit comprises a plurality of switches (S1, S2); a first capacitor (C1) having a first terminal and a second terminal; a second capacitor (C2) having a first terminal and a second terminal; and a first buffer amplifier (BA) having a voltage gain equal to 1-ε, where ε<<1, the first buffer amplifier having an input terminal (301) and an output terminal (302). During the sampling phase, the plurality of switches are configured to couple a first input voltage (VIN) to the first terminal of the first capacitor and a second input voltage (VREF) to the first terminal of the second capacitor. Further, during the amplification phase, the plurality of switches are configured to couple the first terminals of the first and the second capacitors to the input terminal of the first buffer amplifier and the second terminals of the first and second capacitors to the output terminal of the first buffer amplifier.