Shunt-Bypassed Buffer Amplifier for Faster LCD Settling

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Solution Overview

Problem

Existing buffer amplifiers for large-size or high-resolution liquid-crystal displays (LCDs) face challenges in achieving low settling time, which is crucial for ensuring performance.

Innovation Solution

A high-speed buffer amplifier design comprising an input stage, a middle stage with current sources and a shunt circuit, and an output stage, utilizing PMOS and NMOS transistors to efficiently process differential inputs and generate output voltage, with the shunt circuit configured to bypass the floating current source for accelerated response.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If a conventional buffer amplifier design is used, then the circuit structure is simple, but the settling time is long

Engineering Contradiction:
Improvesettling timeVSAvoidcircuit structure
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The buffer amplifier is divided into three distinct stages: input stage, middle stage, and output stage. Each stage has specific transistors and current sources assigned to it, allowing independent optimization of each stage's function. The input stage (transistors M1-M4) handles differential signal reception, the middle stage (transistors M9-M20) provides current amplification with floating current sources, and the output stage (transistors MpL1-MnL2) delivers the final output signal. This segmentation enables the settling time to be reduced by optimizing signal propagation through each stage while maintaining manageable circuit complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Floating current sources are introduced as intermediary elements between the input and output stages. These floating current sources (connected between VDD and GND) act as mediators that provide additional current drive capability during the transition period, accelerating the settling process. The shunt circuit with transistors M12x and M18x serves as another intermediary that can bypass the floating current sources when needed, providing flexible control over the settling behavior without permanently increasing circuit complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If the amplifier processes large-size or high-resolution LCD signals, then the display quality is improved, but the settling time increases

Engineering Contradiction:
Improvedisplay resolutionVSAvoidsettling time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

Different parts of the amplifier circuit are designed with different characteristics optimized for their specific functions. The input stage uses differential pairs for high-precision signal reception, the middle stage employs floating current sources for enhanced drive capability, and the output stage uses complementary transistor pairs for low-impedance output. This local optimization ensures that each stage contributes maximally to both resolution and settling time requirements without compromising overall performance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The amplifier circuit incorporates dynamic elements including floating current sources that can be activated during transitions and shunt circuits that can bypass certain paths. The transistors M12x and M18x in the shunt circuit can dynamically alter the current flow paths based on the operating conditions, allowing the circuit to adapt its behavior to achieve fast settling times while maintaining high resolution performance. This dynamic capability enables the circuit to handle both high-resolution signals and fast settling requirements simultaneously.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20230237973A1High-speed buffer amplifier
Publication Date: 2023.07.27 HIMAX TECH LTD
  • US20230237973A1 patent drawing
  • US20230237973A1 patent drawing

AI summary

A high-speed buffer amplifier includes an input stage including a first channel coupled to receive differential inputs and a second channel coupled to receive the differential inputs; a middle stage including a first current source coupled to receive outputs of the second channel and electrically connected to power, a second current source coupled to receive outputs of the first channel and electrically connected to ground, and a floating current source electrically connected between the first current source and the second current source; and an output stage coupled to the middle stage to generate an output voltage. A shunt circuit is electrically connected between the first current source and the second current source, and configured to bypass the floating current source.