Buffer Amplifier Feedback Circuit for LCD Output Slew Rate
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Solution Overview
Problem
LCD drivers face a trade-off between power consumption and output voltage slew rate during charge-sharing operations, where longer charge-sharing times reduce power consumption but decrease the slew rate of output voltage, affecting display quality.
Innovation Solution
A buffer amplifier circuit with a feedback mechanism, utilizing differential amplifiers with PMOS and NMOS active loads, enhances the slew rate of output signals by controlling gate voltages and incorporating pull-up and pull-down circuits to manage output signals effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If charge sharing time is increased to reduce power consumption, then power consumption decreases, but the slew rate of output voltage decreases
Solution Approach 1:
The patent implements a feedback circuit that feeds back a portion of the output signal to the input side of the buffer amplifier. This feedback mechanism dynamically adjusts the operating point of the amplifier during charge-sharing operations, enabling the system to maintain high slew rate performance even when charge-sharing time is extended for power savings. The feedback loop compensates for the reduced charging capability by actively regulating the output voltage transition.
Solution Approach 2:
The patent changes the operating parameters of the buffer amplifier by introducing controlled feedback signaling that modifies the gain and bandwidth characteristics dynamically. During charge-sharing mode, the feedback circuit adjusts the effective transconductance and output impedance of the amplifier stage, allowing the system to operate with extended charge-sharing times without sacrificing slew rate. This parameter modulation enables the resolution of the power consumption versus performance trade-off.
2Loss of energy
If charge sharing time is increased, then power consumption of row drivers decreases, but charge time of row drivers decreases causing output voltage to fail reaching original data level
Solution Approach 1:
The feedback circuit continuously monitors the output voltage level and compares it with the target data level, then adjusts the drive strength and charging current dynamically. When charge-sharing time is extended, the feedback mechanism ensures that the output voltage still reaches the required original data level by compensating for the reduced charging duration through increased instantaneous charging current or extended voltage transition assistance.
Solution Approach 2:
The feedback circuit prepares the buffer amplifier in advance for the charge-sharing operation by pre-adjusting the operating point and charging capability. Before the charge-sharing mode begins, the system configures the amplifier to operate in a high-gain, high-bandwidth state that ensures the output voltage can reach the original data level even with limited charging time. This preliminary configuration ensures reliable voltage level achievement regardless of the charge-sharing duration.
Data Source
AI summary
A buffer amplifier circuit includes a buffer amplifier including a first differential amplifier having a first active load and a second differential amplifier having a second active load and a feedback circuit configured to feed an output signal of an output terminal of the buffer amplifier back to one of the first and second active loads using differential switch signals and an input signal of the buffer amplifier to enhance a slew rate of the output signal.