Buffer Assignment Balancing in Network Devices

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current network devices face challenges in optimally balancing operations across buffers, leading to issues like buffer skew and delayed propagation of buffer state information, due to outdated or delayed buffer utilization metrics.

Innovation Solution

The implementation of a modified prioritized list of buffers using re-ordering logic that randomly or pseudo-randomly adjusts the positions of buffer sets, reducing buffer skew and optimizing buffer utilization by prioritizing emptier buffers for writing operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If traditional buffer assignment methods are used, then buffer management is simple, but buffer utilization becomes unbalanced leading to buffer skew

Engineering Contradiction:
Improvebuffer management simplicityVSAvoidbuffer utilization balance
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent implements dynamic buffer assignment by continuously reordering the prioritized buffer list based on real-time buffer state information. Instead of using a static assignment method, the system dynamically adjusts buffer priorities to prevent buffer skew, ensuring that buffers are selected for packet writing based on current utilization metrics rather than fixed positions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system employs feedback mechanisms by monitoring buffer state information and using this information to reorder the prioritized buffer list. The buffer state information feeds back into the buffer assignment logic, creating a closed-loop system that continuously optimizes buffer utilization and prevents buffer skew by adjusting assignments based on actual buffer conditions.

Inventive Principle:
Principle #23Feedback

2Device complexity

If buffer state information propagation is delayed, then system complexity is reduced, but buffer assignment accuracy deteriorates

Engineering Contradiction:
Improvesystem complexityVSAvoidbuffer state information accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by reordering the prioritized buffer list in advance based on available buffer state information, even if that information is slightly delayed. The system proactively adjusts buffer priorities before packet assignment occurs, ensuring that the most up-to-date buffer state information is utilized to make informed assignment decisions rather than waiting for perfectly synchronized data.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If more buffers are allocated, then packet drops due to buffer overruns are reduced, but device resource requirements increase

Engineering Contradiction:
Improvepacket delivery reliabilityVSAvoidbuffer memory quantity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent changes the parameter of buffer assignment strategy from static to dynamic reordering based on buffer state. By altering how buffers are selected and prioritized rather than simply increasing buffer quantity, the system achieves better packet delivery reliability through optimized buffer utilization, preventing the need to allocate additional buffer memory resources.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10263919B1Buffer assignment balancing in a network device
Publication Date: 2019.04.16 INNOVIUM INC
  • US10263919B1 patent drawing
  • US10263919B1 patent drawing
  • US10263919B1 patent drawing

AI summary

Techniques for more optimally balancing operations across a set of buffers, such as in buffering packets in a network device or in other contexts, are disclosed. The techniques make use of an ordered list of buffers from which the next available buffer is selected for each operation, as needed. The buffers are first prioritized based on the state(s) of the relevant buffers and/or other factors. The resulting ordered list is then processed using re-ordering logic. This re-ordering logic may, for example, randomly or pseudo-randomly trade the positions of various sets of buffers within the prioritized list. Among other effects, the re-ordering logic thus reduces buffer skew problems from delayed propagation of buffer state information and other issues. In an embodiment, the re-ordering logic is divided into multiple levels of processing, with each level separately passing through the list. Each level of processing may utilize differently configured re-ordering logic.