Buffer Memory Bank Segmentation to Prevent Access Conflicts
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Solution Overview
Problem
Conventional memory systems experience bank conflicts where host and memory access units simultaneously access the same memory bank, impairing the utilization of the buffer memory.
Innovation Solution
The memory banks are divided into external and internal groups for host and memory operations, respectively, preventing simultaneous access and improving buffer memory utilization by segregating operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If memory banks are shared between host and memory access units, then device complexity is reduced, but bank conflicts occur and buffer memory utilization deteriorates
Solution Approach 1:
The buffer memory banks are divided into two separate groups: external memory banks dedicated to host access units and internal memory banks dedicated to memory access units. This segmentation prevents bank conflicts by ensuring that host and memory operations access different memory banks simultaneously, thereby improving buffer memory utilization without significantly increasing overall system complexity.
2Productivity
If memory banks are divided into separate groups for host and memory operations, then bank conflicts are prevented and buffer memory utilization improves, but device complexity increases
Solution Approach 1:
The buffer memory banks are divided into two separate groups: external memory banks dedicated to host access units and internal memory banks dedicated to memory access units. This segmentation prevents bank conflicts by ensuring that host and memory operations access different memory banks simultaneously, thereby improving buffer memory utilization without significantly increasing overall system complexity.
Data Source
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AI summary
A memory controller includes a buffer memory including memory banks, one or more host access units configured to perform an access to the buffer memory for a host, one or more memory access units configured to perform an access to the buffer memory for a memory device, and a processor configured to control an operation of the memory controller. The processor divides the memory banks into an external memory bank group for an external operation related to the host, and an internal memory bank group for an internal operation within a memory system. The host access units access the external memory bank group. The memory access units access the external memory bank group to perform the external operation, and access the internal memory bank group to perform the internal operation.