Buffer Chain Pulse-Like Electrical Pathways for Defect Diagnosis

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Solution Overview

Problem

Existing buffer chains in integrated circuits face challenges in defect identification and diagnosis due to complex electrical pathways, making it difficult to pinpoint faults within the circuit.

Innovation Solution

The implementation of a buffer chain design with pulse-like shaped electrical pathways, where apexes of the pathways are situated at different metal layers, allowing for systematic exposure and imaging using an electron beam prober to identify defects by sequentially removing layers of the routing substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional buffer chains are used with complex electrical pathways, then the circuit functionality is maintained, but defect identification and diagnosis become difficult

Engineering Contradiction:
Improvedefect identification capabilityVSAvoidelectrical pathway complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The electrical pathway is segmented into distinct metal layers (first conductive path in first set of metal layers, second conductive path in second set of metal layers). This segmentation allows defects to be localized to specific layers, making diagnosis easier while maintaining circuit functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The electrical pathway is extended into the vertical dimension by using multiple metal layers stacked at different heights. The apex of the pulse-like shape is positioned at a specific metal layer, creating a three-dimensional structure that facilitates layer-by-layer defect analysis while preserving the two-dimensional circuit layout.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If apexes of electrical pathways are positioned at different metal layers, then defect localization is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvefault localization precisionVSAvoidrouting substrate fabrication complexity
Core Design Contradiction:
Measurement precisionVSManufacturing precision

Solution Approach 1:

The routing substrate is divided into multiple metal layers with distinct functions. Each layer can be manufactured and tested independently, allowing precise fault localization to specific layers while using standard multi-layer PCB manufacturing techniques.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The pulse-like shaped electrical pathway acts as an intermediary structure that connects different metal layers. Its apex position at a specific metal layer serves as a reference point for defect localization, enabling precise fault identification without requiring complex cross-layer alignment.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Difficulty of detecting and measuring

If pulse-like shaped electrical pathways are implemented, then defect identification is facilitated, but the routing substrate structure becomes more complex

Engineering Contradiction:
Improvedefect detection easeVSAvoidrouting substrate structure
Core Design Contradiction:
Difficulty of detecting and measuringVSDevice complexity

Solution Approach 1:

The electrical pathway is designed with a pulse-like three-dimensional shape where the apex is positioned at a specific metal layer. This vertical positioning creates distinct imaging targets at different heights, facilitating defect detection through layer-by-layer exposure while the pathway itself integrates into the existing multi-layer substrate structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The pulse-like shape creates a localized apex region at a specific metal layer that serves as a focal point for defect detection. This local structural feature enhances detectability without requiring complex changes to the overall routing substrate architecture.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8981842B1Integrated circuit comprising buffer chain
Publication Date: 2015.03.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8981842B1 patent drawing
  • US8981842B1 patent drawing
  • US8981842B1 patent drawing

AI summary

Among other things, an integrated circuit and method for routing electrical pathways of an integrated circuit is provided. The integrated circuit comprises a buffer chain coupling a first cell of the integrated circuit to a second cell of the integrated circuit. An electrical pathway coupling a first inverter of the buffer chain with a second inverter of the buffer chain extends through a first set of metal layers and is routed to form a pulse-like shape having an apex at a top layer of the first set.